Datasheet

14 GDA
VCC
17
GDB
+
S Q
QR
PWM1
+
S Q
QR
PWM2
CLKB
OffB
IpeakB
+
+
12CAOA
11CAOB
Driver
Driver
8CSB
9CSA
10
7
CA2
CA1
CLKA
OffA
IpeakA
GmAmp
GmAmp
+
+
IpeakA
IpeakB
GND
PKLMT
RSYNTH
Current
Synthesizer
VINAC
VSENSE
OutA
OutB
GND
Fault
(Clamped at 13.5V)
VCC
(Clamped at 13.5V)
Fault
VSENSE
3 VAO
18 SS
4
3V
ISS
Mult.
x
x
/
VA
GmAmp
-
+
+
+
2.8V
VINAC5
6 IMO
Slew Rate
Correction
10uA
100uA
5V
250nA
ReStart
+
SS
4V
I
IMO
=
V
VINAC
* (V
VAO
– 1)
K
VFF
* 17uA
Voltage
Feed-
Forward
K
VFF
ReStart
10uA
+
5V
Disable
ReStart
Ext.Disable
1mA
+
Adaptive SS
Control
Logic
20
DMAX
2
RDM/
SYNC
CLKA
CLKB
OffA
OffB
SYNC
Logic
1
CDR
19
RT
Oscillator w/
Freq. Dither
+
5V
SYNC
Enable
Dither
Disable
15VCC
+
10.2V
16GND
13VREF
6V
Linear
Regulator
+
8V
EN
25V
9.2V
UVLO
S Q
QR
+
0.75V
ReStart
C
o
ThermSD
160 On
140 Off
0.60V
+
3.18V
+
ZeroPwr 0.75V
VSENSE
SS
0.75V
+
VAO
OVP
Ext.Disable
0.60V
3.08V
0.90V
Fault
250nA
VSENSE
UCC28070
SLUS794E –NOVEMBER 2007–REVISED APRIL 2011 www.ti.com
Functional Block Diagram
10 Copyright © 2007–2011, Texas Instruments Incorporated