Datasheet

UCC28063
www.ti.com
SLUSAO7 SEPTEMBER 2011
ELECTRICAL CHARACTERISTICS
At VCC = 16 V, AGND = PGND = 0 V, VINAC = 3 V, VSENSE = 6 V, HVSEN = 3 V, PHB = 5 V, R
TSET
= 133 kΩ, all voltages
are with respect to GND, all outputs unloaded, 40°C < T
J
= T
A
< 125°C, and currents are positive into and negative out of
the specified terminal, unless otherwise noted.
PARAMETER TEST CONDITION MIN TYP MAX UNIT
VCC Bias Supply
VCC
SHUNT
VCC shunt voltage
(1)
I
VCC
= 10 mA 22 24 26 V
I
VCC(ULVO)
VCC current, UVLO VCC = 11.4 V prior to turn-on 95 200
µA
I
VCC(stby)
VCC current, disabled VSENSE = 0 V 100 200
I
VCC(on)
VCC current, enabled VSENSE = 2 V 5 8 mA
Undervoltage Lockout (UVLO)
VCC
ON
VCC turn-on threshold VCC rising 11.5 12.6 13.5
VCC
OFF
VCC turn-off threshold VCC falling 9.5 10.35 11.5 V
UVLO Hysteresis 1.85 2.15 2.45
Reference
V
REF
VREF output voltage, no load I
VREF
= 0 mA 5.82 6.00 6.18 V
VREF change with load 0 mA I
VREF
2 mA - 1 6
mV
VREF change with VCC 12 V VCC 20 V - +2 +10
Error Amplifier
VSENSEreg25 VSENSE input regulation T
A
= 25°C
5.85 6.00 6.15
voltage
V
VSENSEreg VSENSE input regulation
5.82 6.00 6.18
voltage
I
VSENSE
VSENSE input bias current In regulation 50 100 150 nA
V
ENAB
VSENSE enable threshold,
1.15 1.25 1.35
rising
VSENSE enable hysteresis 0.02 0.07 0.15
V
V
COMPCLMP
COMP high voltage, clamped VSENSE = VSENSEreg 0.3 V 4.70 4.95 5.10
COMP low voltage, saturated VSENSE = VSENSEreg + 0.3 V 0.03 0.125
g
M
VSENSE to COMP 0.99(VSENSEreg) < VSENSE <
40 55 70 µS
transconductance, small signal 1.01(VSENSEreg), COMP = 3 V
VSENSE high-going threshold Relative to VSENSEreg, COMP = 3 V
to enable COMP large signal 3.25% 5% 6.75%
gain, percent
VSENSE low-going threshold to Relative to VSENSEreg, COMP = 3 V
enable COMP large signal gain, 3.25% 5% 6.75%
percent
VSENSE to COMP VSENSE = VSENSEreg 0.4 V ,
210 290 370
transconductance, large signal COMP = 3 V
µS
VSENSE to COMP VSENSE = VSENSEreg + 0.4 V,
210 290 370
transconductance, large signal COMP = 3 V
COMP maximum source current VSENSE = 5.0 V, COMP = 3 V 80 125 170 µA
R
COMPDCHG
COMP discharge resistance HVSEN = 5.2 V, COMP = 3 V 1.6 2.0 2.4 kΩ
I
DODCHG
COMP discharge current during VSENSE = 5.0 V, VINAC = 0.3 V
3.2 4 4.8 µA
Dropout
V
LOW_OV
VSENSE over-voltage Relative to VSENSEreg
7% +8% 10%
threshold, rising
VSENSE over-voltage Relative to V
LOW_OV
1.5% 2% 3%
hysteresis
V
HIGH_OV
VSENSE 2nd over-voltage Relative to VSENSEreg
10.5% 11.3% 14%
threshold, rising
(1) Excessive VCC input voltage and current will damage the device. This clamp will not protect the device from an unregulated bias supply.
If an unregulated bias supply is used, a series-connected Fixed Positive-Voltage Regulator such as the UA78L15A is recommended.
See the Absolute Maximum Ratings table for the limits on VCC voltage, current, and junction temperature.
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