Datasheet

UCC28063
SLUSAO7 SEPTEMBER 2011
www.ti.com
SYSTEM LEVEL PROTECTIONS
FailSafe OVP - Output Over-Voltage Protection
FailSafe OVP prevents any single failure from allowing the output to boost above safe levels. Redundant paths
for output voltage sensing provide additional protection against output over-voltage. Over-voltage protection is
implemented through two independent paths: VSENSE and HVSEN. The converter shuts down if either input
senses a severe over-voltage condition. The output voltage can still remain below a safe limit if either sense path
fails. The device is re-enabled when both sense inputs fall back into their normal ranges. At that time, the gate
drive outputs will resume switching under PWM control. A low-level over-voltage on VSENSE does not trigger
soft-start, but the COMP pin is discharged by an internal 2-kΩ resistance until the output voltage falls below the
2% hysteresis OV-clear threshold. A higher-level over-voltage on VSENSE additionally shuts off the gate-drive
outputs until the OV clears, but still does not trigger a soft-start. However, an overvoltage detected on HVSEN
does trigger a full soft-start and the COMP pin is fully discharged to 20 mV before the soft-start can begin.
Over-Current Protection
Under certain conditions (such as inrush, brownout-recovery, and output over-load) the PFC power stage sees
large currents. It is critical that the power devices be protected from switching during these conditions.
The conventional current-sensing method uses a shunt resistor in series with each MOSFET source leg to sense
the converter currents, resulting in multiple ground points and high power dissipation. Furthermore, since no
current information is available when the MOSFETs are off, the source-resistor current-sensing method results in
repeated turn-on of the MOSFETs during over-current (OC) conditions. Consequently, the converter may
temporarily operate in continuous conduction mode (CCM) and may experience failures induced by excessive
reverse-recovery currents in the boost diodes or other abnormal stresses.
The UCC28063 uses a single resistor to continuously sense the combined total inductor (input) current. This
way, turn-on of the MOSFETs is completely avoided when the inductor currents are excessive. The gate drive to
the MOSFETs is inhibited until total inductor current drops to near zero, precluding reverse-recovery-induced
failures (these failures are most likely to occur when the ac-line recovers from a brownout condition).
The nominal OC threshold voltage during two-phase operation is -200 mV, which helps minimize losses. This
threshold is automatically reduced to -166 mV during single-phase operation, either by detection of a phase
failure or because PHB is driven below 0.8 V. Note that the single-phase threshold is not simply 1/2 of the
dual-phase threshold, because the ratio of the single-phase peak current to the interleaved peak current is higher
than 1/2.
An OC condition immediately turns off both gate-drive outputs, but does not trigger a soft-start and does not
modify the error amplifier operation. The over-current condition is cleared when the total inductor current-sense
voltage falls below the OC-clear threshold (-15 mV).
Following an over-current condition, both MOSFETs are turned on simultaneously once the input current drops to
near zero. Because the two phase currents are temporarily operating in-phase, the current-sense resistance
should be chosen so that OC protection is not triggered with twice the maximum current peak value of either
phase in order to allow quick return to normal operation after an over-current event. Automatic phase-shift control
will re-establish interleaving within a few switching cycles.
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