Datasheet

OVP1 trigger. 2k pull-down

applied to COMP .

OVP1 reset. 2k pull-down

removed from COMP .

COMP current limit

during Soft -Start only

(high-gain disabled )

VSENSE

1.0 2.0 3.0 4.0 5.0 6.0 7.0

+63μA

COMP

-111 μA

-15μA

+15μA

UCC28063

SLUSAO7 – SEPTEMBER 2011

www.ti.com

Soft Start

Soft-start is a process for boosting the output voltage of the PFC converter from the peak of the ac-line input

voltage to the desired regulation voltage under controlled conditions. Instead of a dedicated soft-start pin, the

UCC28063 uses the voltage error amplifier as a controlled current source to increase the PWM duty-cycle by

way of increasing the COMP voltage. To avoid excessive start-up time-delay when the ac-line voltage is low, a

higher current is applied until VSENSE exceeds 3 V at which point the current is reduced to minimize the

tendency for excess COMP voltage at no-load start-up.

The PWM gradually ramps from zero on-time to normal on-time as the compensation capacitor from COMP to

AGND charges from zero to near its final value. This process implements a soft-start, with timing set by the

output current of the error amplifier and the value of the compensation capacitors. In the event of a HVSEN

FailSafe OVP, brownout, external-disable, UVLO fault, or other protection faults, COMP is actively discharged

and the UCC28063 will soft-start after the triggering event is cleared. Even if a fault event happens very briefly,

the fault is latched into the soft-start state and soft-start is delayed until COMP is fully discharged to 20 mV and

the fault is cleared. See Figure 29 for details on the COMP current. See Figure 30 which illustrates an example

of typical system behavior during soft-start.

Figure 29. Expanded COMP Output Current Curve

NOTE

Expanded COMP output current curve including voltage-error amplifier transconductance

and modifications applicable to soft-start and over-voltage conditions.

Product Folder Link(s): UCC28063