Datasheet

ELECTRICAL CHARACTERISTICS
UCC28061
SLUS837A – JUNE 2008 – REVISED JULY 2009 .............................................................................................................................................................. www.ti.com
At VCC = 16 V, AGND = PGND = 0 V, VINAC = 3 V, VSENSE = 6 V, HVSEN = 3 V, PHB = 5 V, R
TSET
= 133 k Ω ; all voltages
are with respect to GND, all outputs unloaded, – 40 ° C < T
J
= T
A
< +125 ° C, and currents are positive into and negative out of
the specified terminal, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCC BIAS SUPPLY
VCC
(shunt)
VCC shunt voltage
(1)
I
VCC
= 10 mA 22 24 26 V
I
VCC(stby)
VCC current, disabled VSENSE = 0 V 100 200 µ A
I
VCC(on)
VCC current, enabled VSENSE = 6 V 5 8 mA
UNDERVOLTAGE LOCKOUT (UVLO)
VCC
(on)
VCC turn-on threshold 11.5 12.6 13.5
VCC
(off)
VCC turn-off threshold 9.5 10.35 11.5 V
UVLO Hysteresis 1.85 2.25 2.65
REFERENCE
V
REF
VREF output voltage, no load I
VREF
= 0 mA 5.82 6.00 6.18 V
VREF change with load 0 mA ≤ I
VREF
≤ – 2 mA 1 6
mV
VREF change with VCC 12 V ≤ VCC ≤ 20 V 1 10
ERROR AMPLIFIER
VSENSE input regulation voltage T
A
= +25 ° C 5.85 6.00 6.15
V
VSENSE input regulation voltage 5.82 6.00 6.18
VSENSE input bias current In regulation 125 300 800 nA
COMP high voltage, clamped VSENSE = 5.8 V 4.70 4.95 5.10
V
COMP low voltage, saturated VSENSE = 6.2 V 0.03 0.125
COMP = 3 V,
g
m
VSENSE to COMP transconductance 75 96 110 µ S
5.94 V < VSENSE < 6.06 V
COMP source current, overdriven VSENSE = 5 V, COMP = 3 V – 120 – 160 – 190
µ A
COMP sink current VSENSE = 6.2 V, COMP = 3 V 7 20 32
VSENSE threshold for COMP offset enable, down
Voltage below V
REF
135 185 235 mV
from V
REF
V
OVP
VSENSE over-voltage threshold, rising 6.25 6.45 6.7
VSENSE over-voltage hysteresis 0.1 0.2 0.4
V
VSENSE enable threshold, rising 1.15 1.25 1.35
VSENSE enable hysteresis 0.02 0.05 0.2
OUTPUT MONITORING
V
PWMCNTL
HVSEN threshold to PWMCNTL HVSEN rising 2.35 2.50 2.65 V
HVSEN input bias current, high HVSEN = 3 V – 0.5 0.5
µ A
HVSEN input bias current, low HVSEN = 2 V 28 36 41
HVSEN rising threshold to over-voltage fault 4.64 4.87 5.1
V
HVSEN falling threshold to over-voltage fault 4.45 4.67 4.80
PHB = 5 V,
Phase Fail filter time to PWMCNTL high 8 12 20 ms
ZCDA switching, ZCDB = 0.5 V
PWMCNTL leakage current high HVSEN = 2 V, PWMCNTL = 15 V – 1 1 µ A
PWMCNTL output voltage low HVSENS = 3 V, IPWMCNTL = 5 mA 0.2 0.5 V
(1) Excessive VCC input voltage and current will damage the device. This clamp does not protect the device from an unregulated supply. If
an unregulated supply is used, a Fixed Positive Voltage Regulator such as the UA78L15A is recommended. See the Absolute Maximum
Ratings table for the limits on VCC voltage and current.
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