Datasheet

Time ns-
14
12
10
-2
0 20 40 60 80 100 120 140
GateDriveOutput V-
8
6
4
2
0
V =20Vand12V
C =4.7nF
CC
LOAD
GDSinkCurrent:
V =20V
V =12V
CC
CC
GDVoltage:
V =20V
V =12V
CC
CC
3.0
2.5
2.0
-1.0
GateDriveSourceCurrent
A
-
1.5
1.0
0.5
0
-0.5
Time ns-
7
6
5
-1
-25 50 100 150 200 250 300
ZCDInput V-
4
3
2
1
0
0
14
12
10
-2
GateDriveOutput V-
8
6
4
2
0
C =4.7nF
LOAD
ZCDInputVoltage
GDOutput:
T = 40 C
T =+25 C
T =+125 C
J
- °
J
J
°
°
Time ns-
500
400
300
-300
-25 50 100 150 200 250 300
CurrentSenseInput
mV
-
200
100
0
-100
-200
0
14
12
10
-2
GateDriveOutput V-
8
6
4
2
0
C =4.7nF
LOAD
CSInput
Voltage
GDOutput:
T = 40 C
T =+25 C
T =+125 C
J
- °
J
J
°
°
V BiasSupplyVoltage V
VCC
- -
15
14
13
12
11
10
8
10 11 12 13 14 15 16 17 18 19 20
GateDriveVoltage V-
9
R =2.7kW
LOAD
T = 40 C- °
J
T =+25 C
J
°
T =+125 C
J
°
UCC28061
www.ti.com .............................................................................................................................................................. SLUS837A – JUNE 2008 – REVISED JULY 2009
TYPICAL CHARACTERISTICS (continued)
At VCC = 16 V, AGND = PGND = 0 V, VINAC = 3 V, VSENSE = 6 V, HVSEN = 3 V, PHB = 5 V, R
TSET
= 133 k Ω ; all voltages
are with respect to GND, all outputs unloaded, T
J
= T
A
= +25 ° C, and currents are positive into and negative out of the
specified terminal, unless otherwise noted.
GATE DRIVE FALLING GATE DRIVE RISING
vs vs
TIME TIME AND DELAY FROM ZCD INPUT
Figure 13. Figure 14.
GATE DRIVE FALLING GATE DRIVE OUTPUT HIGH
vs vs
TIME AND DELAY FROM CS INPUT VCC
Figure 15. Figure 16.
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