Datasheet

DEVICE INFORMATION
ZCDA
VREF
GDA
PGND
VCC
GDB
CS
PWMCNTL
ZCDB
VSENSE
TSET
PHB
COMP
AGND
VINAC
HVSEN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
UCC28060
www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008
UCC28060D
SOIC 16-Pin (D)
Top View
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME NO. I/O
Analog ground: Connect analog signal bypass capacitors, compensation components, and analog
AGND 6 — signal returns to this pin. Connect the analog and power grounds at a single point to isolate high-current
noise signals of the power components from interference with the low-current analog circuits.
Error amplifier output: The error amplifier is a transconductance amplifier, so this output is a
high-impedance current source. Connect voltage regulation loop compensation components from this
pin to AGND. The on-time seen at the gate drive outputs is proportional to the voltage at this pin minus
an offset of approximately 125 mV. During soft-start events (undervoltage, brownout, or disable), COMP
COMP 5 O
is pulled low. Normal operation only resumes after the soft-start event clears and COMP has been
discharged below 0.5 V, making sure that the circuit restarts with a low COMP voltage and a short
on-time. Do not connect COMP to a low-impedance source that would interfere with COMP falling below
0.5 V.
Current sense input: Connect the current sense resistor and the negative terminal of the diode bridge
to this pin. Connect the return of the current sense resistor to the AGND pin with a separate trace. As
input current increases, the voltage on CS goes more negative. This cycle-by-cycle over-current
protection limits input current by turning off both gate driver (GDx) outputs when CS is more negative
than the CS rising threshold (approximately – 200 mV). The GD outputs remain low until CS falls to the
CS falling threshold (approximately – 15 mV). Current sense is blanked for approximately 100 ns
CS 10 I
following the falling edge of either GD output. This blanking filters noise that occurs when current
switches from a power FET to a boost diode. In most cases, no additional current sense filtering is
required. If filtering is required, the filter series resistance must be under 100 Ω to maintain accuracy. To
prevent excessive negative voltage on the CS pin during inrush conditions, connect the current sensing
resistor to the CS pin through a low value external resistor. As with the filter series resistance, this
external resistor needs to be under 100 Ω to maintain accuracy.
GDA 14 O Channel A and channel B gate drive output: Connect these pins to the gate of the power FET for
each phase through the shortest connection practical. If it is necessary to use a trace longer than 0.5 in
(12.6 mm) for this connection, some ringing may occur due to trace series inductance. This ringing can
GDB 11 O
be reduced by adding a 5- Ω to 10- Ω resistor in series with GDA and GDB.
High voltage output sense: The UCC28060 incorporates FailSafe OVP so that any single failure does
not allow the output to boost above safe levels. Output over-voltage is monitored by both VSENSE and
HVSEN and shuts down the PWM if either pin exceeds the appropriate over-voltage threshold. Using
two pins to monitor for over-voltage provides redundant protection and fault tolerance. HVSEN can also
be used to enable a downstream power converter when the voltage on HVSEN is within the operating
HVSEN 8 I
region. Select the HVSEN divider ratio for the desired over-voltage and power-good thresholds. Select
the HVSEN divider impedance for the desired power-good hysteresis. During operation, HVSEN must
never fall below 0.8 V. Dropping HVSEN below 0.8 V puts the UCC28060 into a special test mode, used
only for factory testing. A bypass capacitor from HVSEN to AGND is recommended to filter noise and
prevent false over-voltage shutdown.
Power ground for the integrated circuit: Connect this pin to AGND through a separate short trace to
PGND 13 —
isolate gate driver noise from analog signals.
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Product Folder Link(s): UCC28060