Datasheet

I =
LPEAK
P Ö
OUT
2
V ´ h
IN_MIN
=
300W Ö
2
85V 0.92´
» 5.4A
(11)
I =
LRMS
I
LPEAK
Ö
6
=
5.4A
Ö
6
» 2.2A
(12)
V V- Ö
OUT IN_MAX
2
2V
» 8
=
390V 265V- Ö
2
2V
N
P
N
S
=
(13)
ZCD Resistor Selection (R
ZA
, R
ZB
)
V N
OUT S
N 3mA´
P
» W16.3k
=
390V
8 3mA´
R =R ³
ZA ZB
(14)
R =R =2
ZA ZB
0kW
(15)
HVSENSE
V =V 0.90 351V´ »
OUT_OK OUT
(16)
R =
E
Hysteresis
36 Am
=
108V
36 Am
=3MW
(17)
R =
F
=
=31.185kW » W31.6k
2.5V
V 2.5V-
OUT_OK
R
E
- m36 A
2.5V
351V 2.5V-
3MW
- m36 A
(18)
V =
OUT_MIN
= » 240V
2.5V(R +R )
E F
R
F
2.5V(3M +31.6k )W W
31.6kW
(19)
V =
OV_FAILSAFE
= » 467V
4.87V(R +R )
E F
R
F
4.87V(3M +31.6k )W W
31.6kW
(20)
UCC28060
SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com
This converter uses constant on-time (T
ON
) and zero-current switching (ZCS) to set up the converter timing.
Auxiliary windings off of L1 and L2 detect when the inductor currents are 0. Selecting the turns ratio in
Equation 13 ensures that there is at least 2 V at the peak of high line to reset the ZCD comparator after every
switching cycle.
The turns-ratio of each auxiliary winding is:
The minimum value of the ZCD resistors is selected based on the internal zener clamp maximum current rating
of 3 mA, as shown in Equation 14 .
In this design the ZCD resistors were set to 20 k Ω , as shown in Equation 15 .
The HVSENSE pin programs the PWMCNTL output of the UCC28060. The PWMCNTL open-drain output can be
used to disable a downstream converter while the PFC output capacitor is charging. PWMCNTL starts in high
impedance and pulls to ground when the HVSENSE increases above 2.5 V. Setting the point where PWMCNTL
becomes active requires a voltage divider from the boost voltage to the HVSEN pin to ground. Equation 16 to
Equation 20 show how to set the PWMCNTL pin to activate when the output voltage is within 90% of its nominal
value.
Resistor R
E
sets up the high side of the voltage divider and programs the hysteresis of the PWMCNTL signal.
For this example, R
E
was selected to provide 108 V of hysteresis, as shown in Equation 17 .
Resistor R
F
is used to program the PWMCNTL active threshold, as shown in Equation 18 .
This PWMCNTRL output remains active until a minimum output voltage (V
OUT_MIN
) is reached, as shown in
Equation 19 .
According to the resistor value, the FailSafe OVP threshold should be set according to Equation 20 :
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