Datasheet

Design Goals
Recommended PCB Device Layout
UCC28060
SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com
The specifications for this design were chosen based on the power requirements of a 300 W LCD TV. These
specifications are shown in Table 3 .
Table 3. Design Specifications
PARAMETER MIN TYP MAX UNIT
V
IN
RMS input voltage 85 (V
IN_MIN
) 265 (V
IN_MAX
) V
RMS
V
OUT
Output voltage 390 V
f
LINE
Line frequency 47 63 Hz
PF Power factor at maximum load 0.90
P
OUT
300 W
η Full load efficiency 0.92
f
MIN
Minimum switching frequency 45 kHz
Interleaved transition-mode PFC system architecture dramatically reduces input and output ripple current,
allowing the circuit to use smaller and less expensive filters. To maximize the benefits of interleaving, the input
and output filter capacitors should be located after the two phase currents are combined together. Similar to
other power management devices, when laying out the printed circuit board (PCB) it is important to use star
grounding techniques and keep filter capacitors as close to device ground as possible. To minimize the
interference caused by capacitive coupling from the boost inductor, the device should be located at least 1 in
(25.4 mm) away from the boost inductor. It is also recommended that the device not be placed underneath
magnetic elements. Because of the precise timing requirement, the timing setting resistor R
T
should be put as
close as possible to the TSET pin and returned to the analog ground. See Figure 31 for a recommended
component layout and placement.
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