Datasheet

K =
TH
R
TSET
133kW
´ 1.35
ms
V
;ActiveinHigh-LineRange(UCC28060only)
(6)
K =
TL
R
TSET
133kW
´ 4.0
ms
V
;ActiveinLow-LineRange
(7)
T =
MIN
R
TSET
133kW
´ 2.2ms;MinimumSwitchingPeriod
(8)
Natural Interleaving
Easy Phase Management
UCC28060
SLUS767E MAY 2007 REVISED NOVEMBER 2008 ....................................................................................................................................................
www.ti.com
The on-time factors (K
TH
, K
THS
, K
TL
, K
TLS
) and the minimum switching period T
MIN
are proportional to the time
setting resistor R
TSET
, the resistor from the TSET pin to ground, and they can be calculated by Equation 6
through Equation 8 :
The proper value of R
TSET
results in the clamped maximum on-time, T
ON(max)
, required by the converter operating
at the minimum input line and maximum load.
Under normal operating conditions, the UCC28060 regulates the relative phasing of the channel A and channel B
inductor currents to be very close to 180 ° , minimizing the ripple currents seen at the line source and output
capacitor. The phase control function differentially modulates the on-times of the A and B channels based on the
phase and frequency relationship. This natural interleaving method allows the converter to achieve 180 ° phase
shift and transition mode operation for both phases without the requirements on boost inductor tolerance. As a
result, the current sharing of the A and B channels are proportional to the inductor tolerance. The best current
sharing is achieved when both inductors are exactly the same value.
At light load conditions, because of the small conduction losses resulting from small load current and large
switching losses caused by the discharging of the MOSFET junction capacitors, shutting down one of the power
stages reduces switching loss and increases conduction loss. At certain power levels, the reduction of switching
losses is greater than the increase in conduction losses; better efficiency can be realized. This feature is one of
the major benefits of interleaved power factor correction (PFC) and it is especially valuable for meeting light-load
efficient standards design requirements.
The easy phase management function allows the user to shut down one of the power stages to achieve higher
efficiency at light load conditions by connecting the COMP pin to the PHB pin. Based on theoretical analysis and
experimental results, the UCC28060 preset phase management thresholds can achieve maximum efficiency
improvement. According to the COMP pin voltage, easy phase management shuts down phase B at
corresponding power levels. The thresholds and corresponding power levels are listed in Table 1 .
Table 1. PHB Management Performance with PHB Connected to COMP
PHB THRESHOLDS
PHB THRESHOLD VOLTAGE PERCENTAGE OF FULL POWER
COMP VOLTAGE AT HIGH TO LOW LOW TO HIGH
VAC
RMS
FULL POWER HIGH TO LOW LOW TO HIGH (PHASE B OFF) (PHASE B ON)
85 4.85 V 0.8 V 1.0 V 14% 19%
115 2.7 V 0.8 V 1.0 V 26% 34%
133 2.1 V 0.8 V 1.0 V 35% 45%
187 3.1 V 1.1 V 1.3 V 33% 40%
230 2.1 V 1.1 V 1.3 V 50% 61%
265 1.6 V 1.1 V 1.3 V 67% 81%
The PHB pin can also be driven by an external logic signal to allow customized phase management. To disable
phase management, connect the PHB pin to the VREF pin.
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Product Folder Link(s): UCC28060