Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - PFC 200 µA SOIC 16 N

UCC28060

NATURAL INTERLEAVING FEATURES SYSTEM FEATURES

APPLICATIONS

EMI

Filter

400VDC

Power-GoodtoDownstreamConverter

VCC ZCDA

GDA

ZCDB

GDB

PWMCNTL

VSENSE

COMP

PHB

HVSEN

AGND PGND

VINAC

TSET

VREF

UCC28060

85-265VAC

InputVoltage(V)

70 120 170 220 270

CapacitorRippleCurrent(A)

P =600W

V =400V

OUT

1-PhaseTM

2-PhaseTMInterleave

1-PhaseCCM

UCC28060

www.ti.com

.................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008

Natural Interleaving™ DUAL-PHASE TRANSITION-MODE PFC CONTROLLER

• Cost Savings

234

• Easy Phase Management Facilitates

Compliance to Light-Load Efficient Standards

• Improved Efficiency and Design Flexibility

over Traditional, Single-Phase Continuous

• FailSafe OVP with Dual Paths Prevents Output

Conduction Mode (CCM)

Over-voltage Conditions Caused by

• Input Filter and Output Capacitor Current

Voltage-Sensing Failures

Cancellation:

• Sensorless Current Shaping Simplifies Board

– Reduced current ripple for higher system

Layout and Improves Efficiency

reliability and smaller bulk capacitor

• Inrush Safe Current Limiting:

– Reduced EMI filter size

– Prevents MOSFET conduction during

• Enables Use of Low-Cost Diodes without

inrush

Extensive Snubber Circuitry

– Eliminates reverse recovery events in

• Improved Light-Load Efficiency

output rectifiers

• Improved Transient Response

• Complete System-Level Protection

• 1-A Source/1.8-A Sink Gate Drivers

• Operating Temperature Range: – 40 ° C to

+125 ° C in an SOIC 16-pin package

• 100-W to 800-W Power Supplies

• LCD, Plasma, and DLP

TVs

• Computer Power Supplies

• Entry Level Servers

• Electronic Lighting Ballasts

Typical Application Circuit

Ripple Current Reduction

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 DLP is a registered trademark of Texas Instruments.

3 Natural Interleaving is a trademark of Texas Instuments.

4 All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (36 pages)

PAGE 1
UCC2 8060 UCC28060 www.ti.com ....................................................................................................................................................
PAGE 2
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.
PAGE 3
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 ABSOLUTE MAXIMUM RATINGS (1) All voltages are with respect to GND, –40°C < TJ = TA < +125°C, and currents are positive into and negative out of the specified terminal, unless otherwise noted. UCC28060 Input voltage range VCC (2) –0.5 to +21 PWMCNTL –0.
PAGE 4
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.
PAGE 5
UCC28060 www.ti.com ....................................................................................................................................................
PAGE 6
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.
PAGE 7
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 DEVICE INFORMATION UCC28060D SOIC 16-Pin (D) Top View ZCDB 1 16 ZCDA VSENSE 2 15 VREF TSET 3 14 GDA PHB 4 13 PGND COMP 5 12 VCC AGND 6 11 GDB VINAC 7 10 CS HVSEN 8 9 PWMCNTL TERMINAL FUNCTIONS TERMINAL DESCRIPTION NAME NO.
PAGE 8
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com TERMINAL FUNCTIONS (continued) TERMINAL NAME DESCRIPTION I/O PHB 4 I Phase B enable: This pin turns on/off channel B of the boost converter.
PAGE 9
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 FUNCTIONAL BLOCK DIAGRAM Overcurrent CS VINAC 10 -0.2V/-0.015V + 1.4V + HVSENOV OV TSD OC Burst Operation SinglePhase OC 440ms Delay STOPB Brownout 7 Thermal ShutDown TJ (UCC28060 only) 7mA STOPA 12.6V 10.
PAGE 10
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.
PAGE 11
UCC28060 www.ti.com ....................................................................................................................................................
PAGE 12
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.
PAGE 13
UCC28060 www.ti.com ....................................................................................................................................................
PAGE 14
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.
PAGE 15
UCC28060 www.ti.com ....................................................................................................................................................
PAGE 16
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.
PAGE 17
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 APPLICATION INFORMATION Theory of Operation The UCC28060 contains the control circuits for two boost pulse-width modulation (PWM) power converters. The boost PWM power converters ramp current in the boost inductors for a time period proportional to the voltage on the error amplifier output.
PAGE 18
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.
PAGE 19
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 Zero Crossing Detection and Valley Switching In transition-mode PFC circuits, the MOSFET turns on when the boost inductor current crosses 0.
PAGE 20
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com Over-Current Protection Under certain conditions (such as inrush, brownout recovery, and output overload), the PFC power stage sees large currents. It is critical that the power devices be protected from switching during these conditions.
PAGE 21
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 Improved Error Amplifier The voltage error amplifier is a transconductance amplifier. Voltage loop compensation is connected from the error amplifier output, COMP, to analog ground, AGND. The recommended compensation network is shown in Figure 28. REF COMP + VSENSE CZ CP 4.95 V RZ Figure 28.
PAGE 22
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com Open-Loop Protection If the feedback loop is disconnected from the device, a current source internal to the UCC28060 pulls the VSENSE pin voltage towards ground. When VSENSE falls below 1.20 V, the device is disabled.
PAGE 23
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 DESIGN EXAMPLE An example of the UCC28060 PFC controller in a two-phase transition mode interleaved PFC pre-regulator is shown in Figure 30. F1 Bridge - D3 + CIN CF4 22 pF 12 V L1 D1 CA 2.
PAGE 24
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com Design Goals The specifications for this design were chosen based on the power requirements of a 300 W LCD TV. These specifications are shown in Table 3. Table 3.
PAGE 25
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 VOUT + - RS RG1 R RP CA CF1 RG2 CB CF2 RF CF4 CP RT CF3 RD RC RZB RB U1 RA RE RZA VCC CZ VOUT RZ VOUT Figure 31. Recommended PCB Layout Inductor Selection The boost inductor is selected based on the inductor ripple current requirements at the peak of low line.
PAGE 26
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com ILPEAK = ILRMS = POUT Ö2 300 W Ö2 VIN_MIN ´ h ILPEAK = Ö6 = 85 V ´ 0.92 » 5.4 A (11) 5.4 A » 2.2 A Ö6 (12) This converter uses constant on-time (TON) and zero-current switching (ZCS) to set up the converter timing.
PAGE 27
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 Output Capacitor Selection The output capacitor (COUT) is selected based on holdup requirements as shown in Equation 21. POUT 1 300 W 1 2 h 2 fLINE 0.
PAGE 28
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com The most critical parameter in selecting a current-sense resistor is the surge rating. The resistor needs to withstand a short-circuit current larger than the current required to open the fuse (F1).
PAGE 29
UCC28060 www.ti.com .................................................................................................................................................... SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 Converter Timing Select the timing resistor, RTSET, for the correct on-time (TON) based on KTL, as shown in Equation 36. To ensure proper operation, the timing must be set based on the highest boost inductance (L1MAX).
PAGE 30
UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com 1 CZ = 2p ´ fLINE 5 = ´ RZ 1 47 Hz 2p ´ ´ 6.34 kW 5 = 2.67 mF (46) CP is sized to attenuate high-frequency noise, as shown in Equation 47: 1 1 CP = = = 1.12 nF fMIN 45 kHz 2p ´ ´ 6.34 k W 2p ´ ´ RZ 2 2 (47) The standard values of Equation 48 and Equation 49 should be chosen for CZ and CP.
PAGE 31
PACKAGE OPTION ADDENDUM www.ti.
PAGE 32
PACKAGE OPTION ADDENDUM www.ti.
PAGE 33
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device UCC28060DR Package Package Pins Type Drawing SOIC D 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 10.3 2.1 8.0 W Pin1 (mm) Quadrant 16.
PAGE 34
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UCC28060DR SOIC D 16 2500 333.2 345.9 28.
PAGE 35
PAGE 36
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.