Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - PFC 75 µA SOIC 8

UCC28050, UCC28051

UCC38050, UCC38051

SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009

TRANSITION MODE PFC CONTROLLER

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FEATURES

Transition Mode PFC Controller for Low

Implementation Cost

D Industry Pin Compatibility With Improved

Feature Set

D Improved Transient Response With

Slew-Rate Comparator

D Zero Power Detect to Prevent OVP During

Light Load Conditions

D Accurate Internal V

REF

for Tight Output

Regulation

D Two UVLO Options

D Overvoltage Protection (OVP),

Open-Feedback Protection and Enable

Circuits

D ± 750-mA Peak Gate Drive Current

D Low Start-Up and Operating Currents

D Lead (Pb)-Free Packages

APPLICATIONS

D Switch-Mode Power Supplies for Desktops,

Monitors, TVs and Set Top Boxes (STBs)

D AC Adapter Front-End Power Supplies

D Electronic Ballasts

DESCRIPTION

The UCC38050 and UCC38051 are PFC

controllers for low-to-medium power applications

requiring compliance with IEC 1000-3-2 harmonic

reduction standard. It is designed for controlling a

boost preregulator operating in transition mode

(also referred to as boundary conduction mode or

critical conduction mode operation). It features a

transconductance voltage amplifier for feedback

error processing, a simple multiplier for

generating a current command proportional to the

input voltage, a current-sense (PWM)

comparator, PWM logic and a totem-pole driver

for driving an external FET.

SIMPLIFIED APPLICATION DIAGRAM

UDG−02125

VCC

DRV

GND

ZCD

VO_SNS

COMP

MULTIN

UCC38050

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (31 pages)

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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 TRANSITION MODE PFC CONTROLLER FEATURES D Transition Mode PFC Controller for Low D D D D D D D D D APPLICATIONS D Switch-Mode Power Supplies for Desktops, Implementation Cost Industry Pin Compatibility With Improved Feature Set Improved Transient Response With Slew-Rate Comparator Zero Power Detect to Prevent OVP During Light Load Conditions Accurate Internal VREF for Tight Output Regulation Two UVLO Options Overvoltage
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 description (continued) In the transition mode operation, the PWM circuit is self-oscillating with the turn-on being governed by an inductor zero-current detector (ZCD pin) and the turn-off being governed by the current-sense comparator. Additionally, the controller provides features such as peak current limit, default timer, overvoltage protection (OVP) and enable.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 CONNECTION DIAGRAM D or P PACKAGE (TOP VIEW) VO_SNS 1 8 VCC COMP 2 7 DRV MULTIN 3 6 GND CS 4 5 ZCD ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1) UCCx805x UNIT Supply voltage, VCC (Internally clamped) 20 V Input current into VCC clamp IDD 30 Input current ZCD ±10 Gate drive current (peak), IDRV DRV ±750 Input voltage range, VCC VO_SNS, MULTIN, CS Maxi
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 ELECTRICAL CHARACTERISTICS TA = 0_C to 70_C for the UCC3805x, –40_C to 105_C for the UCC2805x, TA = TJ, VCC = 12 V. supply PARAMETER TEST CONDITIONS MIN TYP MAX VCC operating voltage UNITS 18 Shunt voltage IVCC = 25 mA 18 19 20 Supply current, off VCC = VCC turn−on threshold –300 mV Supply current, disabled VO_SNS = 0.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 ELECTRICAL CHARACTERISTICS TA = 0_C to 70_C for the UCC3805x, –40_C to 105_C for the UCC2805x, TA = TJ, VCC = 12 V. zero power PARAMETER Zero power comparator threshold(1) TEST CONDITIONS Measured on VCOMP MIN 2.1 TYP MAX 2.3 UNITS 2.5 V zero current detect PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Input threshold (rising edge) (1) 1.5 1.7 2.0 V Hysteresis(1) 250 350 450 mV 5 6 0.30 0.65 0.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 BLOCK DIAGRAM 2.7/2.5 V + 0.67/0.57 V 0.23/0.15 V V0_SNS 2.5 V COMP MULTIN ENABLE VREF GOOD 2 PWM + ZERO POWER DETECT 3 2.3 V 8 VCC R Q 7 DRV S Q 6 GND 5 ZCD TIMER + + 40 kW CS REF OVP x x MULT + UVLO + VREFAND BIAS REG INT. BIAS gm VOL. ERROR AMP 1 VREF OVP + 4 1.7/1.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 V CS ^ 0.67 (COMP * 2.5 V) ǒMULTIN ) V OFFSETǓ VOFFSET is approximately 75 mV to improve the zero crossing distortion. ZCD (Pin 5): This pin is the input for the zero current detect comparator. The boost inductor current is indirectly sensed through the bias winding on the boost inductor. The ZCD pin input goes low when the inductor current reaches zero and that transition is detected.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 BLOCK DESCRIPTION UVLO and Reference Block This block generates a precision reference voltage used to obtain tightly controlled UVLO threshold. In addition to generating a 2.5-V reference for the non-inverting terminal of the gM amplifier, it generates the reference voltages for blocks such as OVP, enable, zero power and multiplier. An internal rail of 7.5 V is also generated to drive all the internal blocks.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 BLOCK DESCRIPTION (continued) Zero Power Block When the output of the gM amplifier goes below 2.3 V, the zero power comparator latches the gate drive signal low. The slew rate enhancement circuitry of the gM amplifier that is activated during overvoltage conditions slews the COMP pin to about 2.4 V.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 TYPICAL APPLICATION DIAGRAM RUP − RAC1 + RG1 L COUT RB RZC RS1 RO1 2.7/2.5 V V REF OVP + INT. BIAS CB UVLO VREF AND BIAS REG + VCC + 0.67/0.57 V (50) 0.23/0.15 V (51) VO_SNS ENABLE V REF GOOD gM E/A REF 8 OVP 1 2.5 V RO2 x ÷ MULT x + COMP 7 PWM + R Q S Q DRV 2 MULTIN CV1 ZERO POWER DETECT 3 CV2 RV1 RAC2 RV1 2.3 V CS TIMER + + 40 k Ω 4 CAC1 CS1 GND 6 ZCD 1.7 V/1.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 APPLICATION INFORMATION L VAC D Q C Load RIAC IAC ZCD X ÷ MULT X IMO + S Q Gate Driver Logic R VEA + VREF UDG−02124 Figure 1. Basic Block Diagram of CRM Boost PFC The power stage equations and the transfer functions of the CRM are the same as the CCM. However, implementations of the control functions are different. Transition mode forces the inductor current to operate just at the border of CCM and DCM.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 APPLICATION INFORMATION For low to medium power applications up to approximately 300 W, the CRM boost has an advantage in losses. The filtering requirement is not severe and therefore is not a disadvantage.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 APPLICATION INFORMATION Diode Selection The effects of the reverse recovery current in the diode can be eliminated with relatively little negative impact to the system. The diode selection is based on reverse voltage, forward current, and switching speed.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 APPLICATION INFORMATION Sense Resistor Selection The current sense resistor value must be chosen to limit the output power and it must also use the full dynamic range of the multiplier during normal steady state operation. The value of RS1 is thus selected for maximum power operation at low ac line voltage conditions.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 APPLICATION INFORMATION A controller that has integral control at low frequencies requires a zero near the crossover frequency in order to be stable. The resulting gM amplifer configuration is shown in Figure 3. VOUT + CV1 CV2 RV1 VREF UDG−02122 Figure 3.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 Bias Current The bias voltage is supplied by a bias winding on the inductor. Select the turns ratio so that sufficient bias voltage can be achieved at low ac line voltage. The bias capacitor must be large enough to maintain sufficient voltage with ac line variations. Be sure to connect a 0.1-μF bypass capacitor between the VCC pin and the GND pin as close to the integrated circuit as possible.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 REFERENCE DESIGN A reference design is discussed in 100-W Universal Line Input PFC Boost Converter Using the UCC38050, TI Literature No. SLUU134. The UCC38050 is used for the off-line power factor corrected pre-regulator with operation over a universal input range of 85 V to 265 V with a 400 Vdc regulated output. The schematic is shown in Figure 4 and the board layout for the reference design is shown in Figure 5.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE 6 4.0 ICC = ON 75 kHZ, 1 nF ICC − Supply Current − mA 5 3.0 2.5 2.0 UCC38050 1.5 UCC38051 ICC − Supply Current − mA 3.5 1.0 0.5 4 8 12 VCC − Supply Voltage − V 16 ICC = ON 75 kHZ, No Load 3 2 ICC = ON No Switching 1 0 −50 0 0 4 20 −25 UVLO THRESHOLDS vs TEMPERATURE 2.60 UVLO ON (UCCx8050) 18 2.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 TYPICAL CHARACTERISTICS CURRENT SENSE INPUT THRESHOLD vs MULTIPLIER INPUT VOLTAGE 1.800 COMP = 3.75 V VCS − CS Input Voltage − V 1.6 COMP = 3.5 V 1.4 1.2 COMP = 3.25 V 1.0 0.8 0.6 COMP = 3 V COMP = 2.5 V 0.4 0.2 0.0 COMP = 2.75 V 0 0.5 1.0 1.5 2.0 2.5 VMULTIN − Multiplier Input Voltage− V VCS(max)− Maximum Current Sense Threshold − V 1.8 3.0 MAXIMUM CURRENT SENSE THRESHOLD vs TEMPERATURE 1.775 1.750 1.725 1.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 TYPICAL CHARACTERISTICS gM AMPLIFIER OUTPUT CURRENT vs OUTPUT SENSE VOLTAGE gM AMPLIFIER OUTPUT CURRENT vs OUTPUT SENSE VOLTAGE (SMALL SIGNAL VIEW) 0.012 ICOMP − gM Amplifier Output Current − mA ICOMP − gM Amplifier Output Current − mA 1.5 1.0 0.5 UCCx8051 0 −0.5 UCCx8050 −1.0 −1.5 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 0.008 0.004 0 −0.004 −0.008 −0.012 2.40 VVO_SNS − Output Sense Voltage − V 2.45 2.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 TYPICAL CHARACTERISTICS ZERO CURRENT DETECTION CLAMP RESTART TIME vs TEMPERATURE CURRENT vs VOLTAGE 10 600 8 500 tRESTART − Restart Time − μs IZCD − ZCD Current − mA 6 4 2 0 −2 −4 −6 400 300 200 100 −8 −10 0 1 2 3 4 5 6 0 7 −50 −25 0 VZCD − ZCD Voltage − V 100 125 Figure 19 Figure 18 OUTPUT SATURATION VOLTAGE vs SOURCE CURRENT OUTPUT SATURATION VOLTAGE vs SINK CURRENT 8 2.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 8 PINS SHOWN 0.020 (0,51) 0.014 (0,35) 0.050 (1,27) 8 0.010 (0,25) 5 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 1 4 0.010 (0,25) 0°− 8° A 0.044 (1,12) 0.016 (0,40) Seating Plane 0.010 (0,25) 0.004 (0,10) 0.069 (1,75) MAX PINS ** 0.004 (0,10) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.
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UCC28050, UCC28051 UCC38050, UCC38051 SLUS515F−SEPTEMBER 2002 − REVISED MARCH 2009 MECHANICAL DATA P (PDIP) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant UCC28050DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 UCC28051DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 UCC38050DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UCC28050DR SOIC D 8 2500 340.5 338.1 20.6 UCC28051DR SOIC D 8 2500 340.5 338.1 20.6 UCC38050DR SOIC D 8 2500 340.5 338.1 20.
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