Datasheet

www.ti.com
UCC28019
SLUS755B – APRIL 2007 – REVISED DECEMBER 2007
ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise noted, VCC = 15 V
DC
, 0.1 µ F from VCC to GND, -40 ° C ≤ T
J
= T
A
≤ 125 ° C. All voltages are with respect to
GND. Currents are positive into and negative out of the specified terminal.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Current Loop
gmi Transconductance gain T
A
= 25 ° C 0.75 0.95 1.15 mS
Output linear range 50 µ A
ICOMP voltage during OLP VSENSE = 0.5 V 3.7 4.0 4.3 V
Voltage Loop
V
REF
Reference voltage -40 ° C ≤ T
A
≤ 125 ° C 4.90 5.00 5.10 V
gmv Transconductance gain 31.5 42 52.5 µ S
Maximum sink current under normal
VSENSE = 6 V, VCOMP = 4 V 21 30 38
operation
Source current under soft start VSENSE = 4 V, VCOMP = 0 V – 21 -30 -38
µ A
VSENSE = 4 V, VCOMP = 0 V – 100 – 170 – 250
Maximum source current under EDR
operation
VSENSE = 4 V, VCOMP = 4 V – 60 – 100 – 140
Enhanced dynamic response, V
SENSE
4.63 4.75 4.87 V
low threshold, falling
V
SENSE
input bias current 1 V ≤ VSENSE ≤ 5 V 100 250 nA
V
COMP
voltage during OLP VSENSE = 0.5 V, I
VCOMP
= 0.5 mA 0 0.2 0.4 V
GATE Driver
GATE current, peak, sinking
(1)
C
GATE
= 4.7 nF 2.0
A
GATE current, peak, sourcing
(1)
C
GATE
= 4.7 nF – 1.5
GATE rise time C
GATE
= 4.7 nF, GATE = 2 V to 8 V 40 60
ns
GATE fall time C
GATE
= 4.7 nF, GATE = 8 V to 2 V 25 40
GATE low voltage, no load GATE = 0 A 0 0.05
GATE low voltage, sinking GATE = 20 mA 0.3 0.8
GATE low voltage, sourcing GATE = -20 mA – 0.3 – 0.8
GATE low voltage, sinking VCC = 5 V, GATE = 5 mA 0.2 0.75 1.2
V
GATE low voltage, sinking VCC = 5 V, GATE = 20 mA 0.2 0.9 1.5
GATE high voltage VCC = 20 V, C
GATE
= 4.7 nF 11 12.5 14
GATE high voltage VCC = 11 V, C
GATE
= 4.7 nF 9.5 10.5 11.0
VCC = VCC
OFF
+ 0.2 V,
GATE high voltage 8.0 9.0 10.2
C
GATE
= 4.7 nF
(1) Not tested. Characterized by design.
4 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): UCC28019