Datasheet

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Sense Resistor
1 25
SOC
SENSE
L _ PEAK (max)
V
R
I .
=
´
0 66
0 075
7 03 1 25
SENSE
. V
R .
. A .
= = W
´
0 067
SENSE
R .= W
SENSERMSINRsense
RIP
2
(max)_
=
2
4 52 0 067 1 36
Rsense
P ( . A ) . . W= ´ W =
PCL
PCL
SENSE
V
I
R
=
1 15
17 16
0 067
PCL
. V
I . A
.
= =
W
UCC28019
SLUS755B – APRIL 2007 – REVISED DECEMBER 2007
To accommodate the gain of the internal non-linear power limit, R
SENSE
, is sized such that it will trigger the soft
over-current at 25% higher than the maximum peak inductor current using the minimum SOC threshold, V
SOC
, of
ISENSE.
Using a parallel combination of available standard value resistors, the sense resistor is chosen.
The power dissipated across the sense resistor, P
Rsense
, must be calculated:
The peak current limit, PCL, protection feature will be triggered when current through the sense resistor results in
the voltage across R
SENSE
to be equal to the V
PCL
threshold. For a worst case analysis, the maximum V
PCL
threshold is used:
To protect the device from inrush current, a standard 220- Ω resistor, R
ISENSE
, is placed in series with the ISENSE
pin. A 1000-pF capacitor is placed close to the device to improve noise immunity on the ISENSE pin.
30 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): UCC28019