Datasheet

www.ti.com

Output Over-Voltage Protection (OVP)

Open Loop Protection/Standby (OLP/Standby)

Output Under-Voltage Detection (UVD) / Enhanced Dynamic Response (EDR)

OPEN LOOP

PROTECTION/

STANDBY

FB1

Output Voltage

Standby

OLP/STANDBY

FB2

OVERVOLTAGE

OVP

VSENSE

Optional

UNDERVOLTAGE

UVD

4.75V

5.25V

0.82V

UCC28019

SLUS755B – APRIL 2007 – REVISED DECEMBER 2007

OUT(OVP)

is the output voltage exceeding 5% of the rated value, causing VSENSE to exceed a 5.25-V threshold

(5-V reference voltage + 5%), V

OVP

. The normal voltage control loop is bypassed and the GATE output is

disabled until VSENSE falls below 5.25 V. For example, V

OUT(OVP)

is 420 V in a system with a 400-V rated output.

If the output voltage feedback components were to fail and disconnect (open loop) the signal from the VSENSE

input, then it is likely that the voltage error amp would increase the GATE output to maximum duty cycle. To

prevent this, an internal pull-down forces VSENSE low. If the output voltage falls below 16% of its rated voltage,

causing VSENSE to fall below 0.8 V, the device is put in Standby, a state where the PWM switching is halted

and the device is still on but draws standby current below 3 mA. This shutdown feature also gives the designer

the option of pulling VSENSE low with an external switch.

During large changes in load, Enhanced Dynamic Response (EDR) acts to speed up the slow response of the

low-bandwidth voltage loop.

Figure 24. Over Voltage Protection, Open Loop Protection/Standby

Product Folder Link(s): UCC28019