Datasheet

Output Under-Voltage Detection (UVD) and Enhanced Dynamic Response (EDR)
+
Over and Under Voltage Protection
Open Loop Protection / Standby
Soft-Start Complete
OPEN LOOP
PROTECTION/STANDBY
R
FB1
Output Voltage
Standby
OLP/STANDBY
R
FB2
+
OVERVOLTAGE
OVP
VSENSE
Optional
+
UNDERVOLTAGE UVD4.75V
5.25V
0.82V
+
SOFT-START COMPLETE 4.95V END OF SS
Feedback
Voltage
OVP 105% V
REF
OLP
Soft-Start
(No EDR
to 99% V
REF
)
OLP
OVP
(No Gate Output)
Run
UVD
(EDR on)
Protection
State
100% V
REF
OLP/SS 16% V
REF
Run
EDR 95% V
REF
UCC28019A
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.................................................................................................................................................. SLUS828B DECEMBER 2008 REVISED APRIL 2009
During normal operation, small perturbations on the PFC output voltage rarely exceed 5% deviation and the
normal voltage control loop gain drives the output back into regulation. For large changes in line or load, if the
output voltage drop exceeds -5%, an output under-voltage is detected (UVD) and Enhanced Dynamic Response
(EDR) acts to speed up the slow response of the low-bandwidth voltage loop. During EDR, the transconductance
of the voltage error amplifier is increased approximately 16 times to speed charging of the voltage-loop
compensation capacitors to the level required for regulation. EDR is removed when VSENSE > 4.75 V. The EDR
feature is not activated until soft start is completed.
Figure 22. OVP, UVD, OLP/ Standby, Soft Start Complete
Figure 23. Soft Start and Protection States
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Product Folder Link(s): UCC28019A