Datasheet

Gate Driver
R
OL
R
G
C
GD
C
GS
C
OSS
V
DS
V
IN
I
SNK
V
IN
V
TH
ON OFF
Miller Turn -On Spike in V
GS
V
DS
of
MOSFET
V
GS
of
MOSFET
UCC27611
SLUSBA5B –DECEMBER 2012 www.ti.com
An example of a situation where Miller turn on is a concern is synchronous rectification (SR). In SR application,
the dV and dt occurs on MOSFET drain when the MOSFET is already held in off state by the gate driver. The
current discharging the C
GD
Miller capacitance during this dV and dt is shunted by the pull-down stage of the
driver. If the pull-down impedance is not low enough then a voltage spike can result in the V
GS
of the MOSFET,
which can result in spurious turn on. This phenomenon is illustrated in Figure 15. UCC27611 offers a best-in-
class, 0.35-Ω (typ) pull-down impedance boosting immunity against Miller turn on.
Figure 15. Low Pull-Down Impedance in UCC27611, 4-A and 6-A Asymmetrical Drive
(output stage mitigates Miller turn-on effect)
The driver output voltage swings between VDD and GND providing rail-to-rail operation, thanks to the MOS
output stage which delivers very low dropout. The presence of the MOSFET body diodes also offers low
impedance to switching overshoots and undershoots. This means that in many cases, external Schottky diode
clamps may be eliminated. The outputs of these drivers are designed to withstand 500-mA reverse current
without either damage to the device or logic malfunction.
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