Datasheet

t
D2
t
D2
90%
10%
OUTPUT
Low
High
Low
High
INPUT
(IN- pin)
t
f
t
r
t
D2
t
D2
90%
10%
OUTPUT
Low
High
Low
High
INPUT
(IN- pin)
t
f
t
r
Enable pin
t
D1
t
D2
Low
90%
10%
IN- pin
OUTPUT
High
INPUT
(IN+ pin)
Low
High
t
f
t
r
t
D1
t
Low
90%
10%
IN- pin
OUTPUT
High
INPUT
(IN+ pin)
Low
High
t
f
t
r
UCC27531
UCC27533, UCC27536
UCC27537, UCC27538
SLUSBA7D – DECEMBER 2012–REVISED APRIL 2013 www.ti.com
Timing Diagram
Figure 1.
UCC27531: (OUTPUT = OUTH tied to OUTL) INPUT = IN, (EN = VDD), or INPUT = EN, (IN = VDD)
UCC27537: (OUTPUT = OUT) INPUT = IN+, (EN = VDD), or INPUT = EN, (IN+ = VDD)
UCC27538: (OUTPUT = OUTH tied to OUTL) INPUT = IN1, (IN2 = VDD), or INPUT = IN2, (IN1 = VDD)
Figure 2. UCC27533: (OUTPUT = OUT) INPUT = IN+
UCC27536: (OUTPUT = OUT) INPUT = EN
Figure 3. UCC27533: (OUTPUT = OUT) ENABLE = IN+
UCC27536: (OUTPUT = OUT) ENABLE = EN
6 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: UCC27531 UCC27533, UCC27536 UCC27537, UCC27538