Datasheet

Gate Driver
R
OL
R
G
C
GD
C
GS
C
OSS
V
DS
V
IN
I
SNK
V
IN
V
TH
ON OFF
Miller Turn -On Spike in V
GS
V
DS
of
MOSFET
V
GS
of
MOSFET
UCC27531
UCC27533, UCC27536
UCC27537, UCC27538
www.ti.com SLUSBA7D – DECEMBER 2012–REVISED APRIL 2013
The UCC2753x is capable of delivering 2.5-A source, and up to 5-A sink at VDD = 18 V. Strong sink capability
results in a very low pull-down impedance in the driver output stage which boosts immunity against the parasitic
Miller turn-on (high slew rate dV/dt turn on) effect that is seen in both IGBT and FET power switches .
An example of a situation where Miller turn on is a concern is synchronous rectification (SR). In SR application,
the dV/dt occurs on MOSFET drain when the MOSFET is already held in Off state by the gate driver. The current
charging the C
GD
Miller capacitance during this high dV/dt is shunted by the pull-down stage of the driver. If the
pull-down impedance is not low enough then a voltage spike can result in the V
GS
of the MOSFET, which can
result in spurious turn on. This phenomenon is illustrated in Figure 43.
Figure 43. Low Pull-Down Impedance in UCC2753x
(output stage mitigates Miller turn-on effect)
The driver output voltage swings between VDD and GND providing rail-to-rail operation, thanks to the MOS
output stage which delivers very low dropout. The presence of the MOSFET body diodes also offers low
impedance to switching overshoots and undershoots. This means that in many cases, external Schottky diode
clamps may be eliminated.
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Product Folder Links: UCC27531 UCC27533, UCC27536 UCC27537, UCC27538