Datasheet

VDD

Narrow Pulse at

each Turn On

Anti Shoot -

Through

Circuitry

Input Signal

NMOS

, Pull Up

OUTL

OUTH

UCC27531

UCC27533, UCC27536

UCC27537, UCC27538

SLUSBA7D – DECEMBER 2012–REVISED APRIL 2013

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Output Stage

The output stage of the UCC2753x device is illustrated in Figure 42. The UCC2753x device features a unique

architecture on the output stage which delivers the highest peak source current when it is most needed during

the Miller plateau region of the power switch turn-on transition (when the power switch drain/collector voltage

experiences dV/dt). The device output stage features a hybrid pull-up structure using a parallel arrangement of

N-Channel and P-Channel MOSFET devices. By turning on the N-Channel MOSFET during a narrow instant

when the output changes state from low to high, the gate driver device is able to deliver a brief boost in the peak

sourcing current enabling fast turn on.

Figure 42. UCC27531 Gate Driver Output Stage

Split output depicted in Figure 42. For devices with single OUT pin, OUTH and OUTL are connected internally

and then connected to OUT.

The R

parameter (see Electrical Table) is a DC measurement and it is representative of the on-resistance of

the P-Channel device only, since the N-Channel device is turned-on only during output change of state from low

to high. Thus the effective resistance of the hybrid pull-up stage is much lower than what is represented by ROH

parameter. The pull-down structure is composed of a N-Channel MOSFET only. The ROL parameter (see

ELECTRICAL CHARACTERISTICS), which is also a DC measurement, is representative of true impedance of

the pull-down stage in the device. In UCC2753x, the effective resistance of the hybrid pull-up structure is

approximately 3 x R

Product Folder Links: UCC27531 UCC27533, UCC27536 UCC27537, UCC27538