Datasheet
UCC27518
UCC27519
www.ti.com
SLUSB33 –MAY 2012
Operating Supply Current
The UCC27518 and UCC27519 features very low quiescent I
DD
currents. The typical operating supply current in
Under Voltage LockOut (UVLO) state and fully-on state (under static and switching conditions) are summarized
in Figure 5, Figure 6 and Figure 7. The I
DD
current when the device is fully on and outputs are in a static state
(DC high or DC low, refer Figure 7) represents lowest quiescent I
DD
current when all the internal logic circuits of
the device are fully operational. The total supply current is the sum of the quiescent I
DD
current, the average I
OUT
current due to switching and finally any current related to pull-up resistors on the unused input pin. For example
when the inverting input pin is pulled low additional current is drawn from VDD supply through the pull-up
resistors (refer to DEVICE INFORMATION for the device Block Diagram). Knowing the operating frequency (f
SW
)
and the MOSFET gate (Q
G
) charge at the drive voltage being used, the average I
OUT
current can be calculated
as product of Q
G
and f
SW
.
A complete characterization of the IDD current as a function of switching frequency at different VDD bias
voltages under 1.8-nF switching load is provided in Figure 15. The strikingly linear variation and close correlation
with theoretical value of average I
OUT
indicates negligible shoot-through inside the gate-driver device attesting to
its high-speed characteristics.
Input Stage
The input pins of UCC27518 and UCC27519 are based on CMOS input logic where the threshold voltage level is
a function of the bias voltage applied on the VDD pin. Typically, the Input High Threshold (V_INH) is 55% VDD
and Input Low Threshold (VIN_L) is 39% VDD. Hysteresis (typically 19% VDD) available on the input threshold
offers noise immunity. With high VDD voltages resulting in wide hysteresis, slow dV/dt input signals are
acceptable in the INx pins and RC circuits can be inserted between the input PWM signal and the INx pins of
UCC27518/9, to program a delay between the input signal and output transition.
Enable Function
The Enable pin is based on a non-inverting configuration (active high operation). When EN pin is driven high the
output is enabled and when EN pin is driven low the output is disabled. Unlike input pin, the enable pin threshold
is based on a TTL/CMOS compatible input threshold logic that does not vary with the supply voltage. Typically,
the Enable High Threshold (V_ENH) is 2.1 V and Enable Low Threshold (VEN_L) is 1.25 V. Thus the EN pin can
be effectively controlled using logic signals from 3.3-V and 5-V microcontrollers. The EN pin is internally pulled
up to VDD using pull-up resistor as a result of which the output of the device is enabled in the default state.
Hence the EN pin can be left floating or Not Connected (N/C) for standard operation, when enable feature is not
needed. Essentially, this allows the UCC27518/19 devices to be pin-to-pin compatible with TI’s previous
generation drivers TPS2828/9 respectively, where pins #1 is N/C pin.
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Product Folder Link(s): UCC27518 UCC27519