Datasheet
UCC27518
UCC27519
www.ti.com
SLUSB33 –MAY 2012
UCC2751x Product Family
The UCC2751x family of gate driver products (Table 3) represent Texas Instruments’ latest generation of single-
channel, low-side high-speed gate driver devices featuring high-source/sink current capability, industry best-in-
class switching characteristics and a host of other features (Table 4) all of which combine to ensure efficient,
robust and reliable operation in high-frequency switching power circuits.
Table 3. UCC2751x Product Family Summary
PEAK CURRENT
PART NUMBER PACKAGE INPUT THRESHOLD LOGIC
(SOURCE/SINK)
UCC27511DBV
(1)
SOT-23, 6 pin
4-A/8-A
CMOS/TTL-Compatible
(Asymmetrical Drive)
UCC27512DRS
(1)
3 mm x 3 mm WSON, 6 pin
(low voltage, independent of VDD
UCC27516DRS
(1)
3 mm x 3 mm WSON, 6 pin
bias voltage)
UCC27517DBV
(1)
SOT-23, 5 pin
4-A/4-A
(Symmetrical Drive)
UCC27518DBV SOT-23, 5 pin
CMOS
(follows VDD bias voltage)
UCC27519DBV SOT-23, 5 pin
(1) Visit www.ti.com for the latest product datasheet.
Table 4. UCC2751x Family of Features and Benefits
FEATURE BENEFIT
High Source/Sink Current Capability High current capability offers flexibility in employing UCC2751x
4 A/8 A (Asymmetrical) – UCC27511/2 family of devices to drive a variety of power switching devices at
4 A/4 A (Symmetrical) – UCC27516/7 varying speeds
Best-in-class 13-ns (typ) Propagation delay Extremely low pulse transmission distortion
Expanded VDD Operating range of 4.5 V to 18 V Flexibility in system design
Low VDD operation ensures compatibility with emerging wide band-
Expanded Operating Temperature range of -40°C to 140°C
gap power devices such as GaN
(See Electrical Characteristics table)
VDD UVLO Protection Outputs are held low in UVLO condition, which ensures predictable,
glitch-free operation at power-up and power-down
Outputs held low when input pins (INx) in floating condition Safety feature, especially useful in passing abnormal condition tests
during safety certification
Ability of input pins (and enable pin in UCC27518/9) to handle System simplification, especially related to auxiliary bias supply
voltage levels not restricted by VDD pin bias voltage architecture
Split output structure in UCC27511 (OUTH, OUTL) Allows independent optimization of turn-on and turn-off speeds
Strong sink current (8 A) and low pull-down impedance (0.375 Ω) in High immunity to C x dV/dt Miller turn-on events
UCC27511/2
CMOS/TTL compatible input threshold logic with wide hysteresis in Enhanced noise immunity, while retaining compatibility with
UCC27511/2/6/7 microcontroller logic level input signals (3.3 V, 5 V) optimized for
digital power
CMOS input threshold logic in UCC27518/9 (VIN_H – 70% VDD, Well suited for slow input voltage signals, with flexibility to program
VIN_L – 30% VDD) delay circuits (RCD)
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