Datasheet
UCC27423-Q1
UCC27424-Q1
UCC27425-Q1
SGLS274F –SEPTEMBER 2008–REVISED SEPTEMBER 2012
www.ti.com
The switching load presented by a power MOSFET can be converted to an equivalent capacitance by examining
the gate charge required to switch the device. This gate charge includes the effects of the input capacitance plus
the added charge needed to swing the drain of the device between the ON and OFF states. Most manufacturers
provide specifications that provide the typical and maximum gate charge, in nC, to switch the device under
specified conditions. Using the gate charge Q
g
, one can determine the power that must be dissipated when
charging a capacitor. This is done by using the equivalence Q
g
= CeffV to provide the following equation for
power:
P = C × V
2
× f = Q
g
× f
This equation allows a power designer to calculate the bias power required to drive a specific MOSFET gate at a
specific bias voltage.
Enable
UCC2742x-Q1 provide dual enable inputs for improved control of each driver channel operation. The inputs
incorporate logic compatible thresholds with hysteresis. They are internally pulled up to V
DD
with 100-kΩ resistor
for active high operation. When ENBA and ENBB are driven high, the drivers are enabled; when ENBA and
ENBB are low, the drivers are disabled. The default state of the enable pin is to enable the driver and, therefore,
can be left open for standard operation. The output states when the drivers are disabled is low, regardless of the
input state. See for operation using enable logic.
Enable inputs are compatible with both logic signals and slowly changing analog signals. They can be directly
driven, or a power-up delay can be programmed with a capacitor between ENBA/ENBB and GND. ENBA and
ENBB control input A and input B, respectively.
Thermal Information
The useful range of a driver is greatly affected by the drive power requirements of the load and the thermal
characteristics of the IC package. For a power driver to be useful over a particular temperature range, the
package must allow for the efficient removal of the heat produced while keeping the junction temperature within
rated limits.
As shown in the power dissipation rating table, the SOIC-8 (D) package has a power rating of approximately 0.5
W with T
A
= 70°C. This limit is imposed in conjunction with the power derating factor also given in the table. Note
that the power dissipation in the previous example is 0.432 W with a 10-nF load, 12-V V
DD
, switched at 300 kHz.
Thus, only one load of this size could be driven using the D package, even if the two onboard drivers are
paralleled.
References
[1] Laszlo Balogh, Power Supply Seminar SEM-1400 Topic 2: Design And Application Guide For High Speed
MOSFET Gate Drive Circuits (SLUP133)
[2] Bill Andreycak, Practical Considerations in High Performance MOSFET, IGBT and MCT Gate Drive Circuits
(SLUA105)
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