Datasheet
P 0.432 W
I 0.036 A
V 12 V
= = =
UCC27323, UCC27324, UCC27325
UCC37323, UCC37324, UCC37325
www.ti.com
SLUS492H –JUNE 2001–REVISED MAY 2013
VDD
Although quiescent VDD current is very low, total supply current will be higher, depending on OUTA and OUTB
current and the programmed oscillator frequency. Total VDD current is the sum of quiescent VDD current and the
average OUT current. Knowing the operating frequency and the MOSFET gate charge (Qg), average OUT
current is calculated from Equation 1.
I
OUT
= Qg × f
where
• f is frequency (1)
For the best high-speed circuit performance, two V
DD
bypass capacitors are recommended tp prevent noise
problems. The use of surface mount components is highly recommended. A 0.1-μF ceramic capacitor must be
located closest to the VDD to ground connection. In addition, a larger capacitor (such as 1-μF) with relatively low
ESR must be connected in parallel, to help deliver the high current peaks to the load. The parallel combination of
capacitors must present a low impedance characteristic for the expected current levels in the driver application.
Drive Current and Power Requirements
The UCC37323/4/5 family of drivers are capable of delivering 4-A of current to a MOSFET gate for a period of
several-hundred nanoseconds. High peak current is required to turn the device ON quickly. Then, to turn the
device OFF, the driver is required to sink a similar amount of current to ground which repeats at the operating
frequency of the power device. A MOSFET is used in this discussion because it is the most common type of
switching device used in high frequency power conversion equipment.
References 1 and 2 discuss the current required to drive a power MOSFET and other capacitive-input switching
devices. Reference 2 includes information on the previous generation of bipolar IC gate drivers (see
References).
When a driver IC is tested with a discrete, capacitive load calculating the power that is required from the bias
supply is fairly simple. The energy that must be transferred from the bias supply to charge the capacitor is given
by Equation 2.
E = ½CV
2
where
• C is the load capacitor
• V is the bias voltage feeding the driver (2)
There is an equal amount of energy transferred to ground when the capacitor is discharged. This leads to a
power loss given by Equation 3.
P = 2 × ½CV
2
f
where
• f is the switching frequency (3)
This power is dissipated in the resistive elements of the circuit. Thus, with no external resistor between the driver
and gate, this power is dissipated inside the driver. Half of the total power is dissipated when the capacitor is
charged, and the other half is dissipated when the capacitor is discharged. An actual example using the
conditions of the previous gate drive waveform helps to clarify this.
With V
DD
= 12 V, C
LOAD
= 10 nF, and f = 300 kHz, the power loss is calculated with Equation 4.
P = 10 nF × (12)
2
× (300 kHz) = 0.432 W (4)
With a 12-V supply, this equates to a current of (see Equation 5):
(5)
The actual current measured from the supply is 0.037 A, and is very close to the predicted value. But, the I
DD
current that is due to the IC internal consumption must be considered. With no load the IC current draw is 0.0027
A. Under this condition the output rise and fall times are faster than with a load, which could lead to an almost
insignificant, yet measurable current due to cross-conduction in the output stages of the driver. However, these
small current differences are buried in the high frequency switching spikes, and are beyond the measurement
capabilities of a basic lab setup. The measured current with 10-nF load is reasonably close to that expected.
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