Datasheet

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SLUS486B − AUGUST 2001 − REVISED JULY 2003
4
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ELECTRICAL CHARACTERISTICS
V
DD
= 12-V, 1-µF capacitor from VDD to GND, 1-µF capacitor from VHI to SW, 0.1-µF and 2.2-µF capacitor from PVLO to PGND, PVLO tied to
VLO, T
A
= −40C to 105C for the UCC2722x, T
A
= T
J
(unless otherwise noted)
G1 main output
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Sink resistance SW = 0 V, VHI = 6 V, IN = 0 V, G1 = 0.5 V 0.3 0.9 1.5
Ω
Source resistance
(2)
SW = 0 V, VHI = 6 V, IN = 6.5 V, G1 = 5.5 V 10 25 45
Ω
Source current
(1)(2)
SW = 0 V, VHI = 6 V, IN = 6.5 V, G1 = 3.0 V −3 −3.3
A
Sink current
(1)(2)
SW = 0 V, VHI = 6 V, IN = 0 V, G1 = 3.0 V 3 3.3
A
Rise time C = 2.2 nF from G1 to SW, V
DD
= 20 V 17 25
ns
Fall time C = 2.2 nF from G1 to SW, V
DD
= 20 V 17 25
ns
G2 SR output
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Sink resistance
(2)
PVLO = 6.5 V, IN = 6.5 V, G1 = 0.25 V 5 15 30
Ω
Source resistance
(2)
PVLO = 6.5 V, IN = 0 V, G2 = 6.0 V 10 20 35
Ω
Source current
(1)(2)
PVLO = 6.5 V, IN = 0 V G2 = 3.25 V −3 −3.3
A
Sink current
(1)(2)
PVLO = 6.5 V, IN = 6.5 V G2 = 3.25 V 3 3.3
A
Rise time
(2)
C = 2.2 nF from G2 to PGND V
DD
= 20 V 17 25
ns
Fall time C = 2.2 nF from G2 to PGND V
DD
= 20 V 20 35
ns
deadtime delay
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
OFF, G2
, IN to G2 falling 60 80 100
t
OFF, G1
, IN to G1 falling 55 80 110
Delay Step Resolution 3.5 4.1 4.7
t
ON, G1
minimum −15
ns
t
ON, G1
maximum 48
ns
t
ON, G2
minimum −21
t
ON
,
G2
maximum 38
NOTE 1: Ensured by design. Not production tested.
2: The pullup / pulldown circuits of the drivers are bipolar and MOSFET transistors in parallel. The peak output current rating is the
combined current from the bipolar and MOSFET transistors. The output resistance is the R
DS(ON) of the MOSFET transistor when the
voltage on the driver output is less than the saturation voltage of the bipolar transistor.
UDG−01042
UCC27222
t
OFF,G1
t
OFF,G2
t
ON,G1
t
ON,G2
IN
G1
G2
3.25 V
10%
90%
90%
10%
Figure 1. Predictive Gate Drive Timing Diagram