Datasheet
SLUS486B − AUGUST 2001 − REVISED JULY 2003
10
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APPLICATION INFORMATION
regulator current and power dissipation
The regulator current can be calculated from the dc or average current required by the two gate drivers. This
current can be expressed as:
I
REG
+ F
SW
ǒ
C
EQ
VLO ) Q
G
Ǔ
Assuming all the power dissipation is internal to the device, and the internal bias current is negligible, the power
dissipated by the device is:
P
DIS
+ F
SW
ǒ
C
EQ
VLO ) Q
G
Ǔ
VDD
For a 500-kHz design, using MOSFETs with the gate charge characteristics shown in Figure 4 for both Q1 and
Q2, the average regulator current would be 35 mA, and, when operated from a 12-V input rail, the resulting
power dissipation is calculated to be 420 mW.
systems using 3.3-V or 5-V power input and 12-V gate drive
Figure 5 shows a schematic for systems where the power bus input is 5 V and 12 V is available for powering
the gate drives. This system provides the 6.5-V gate drive to both MOSFETs, while the power stage operates
off the 3.3-V or 5-V bus.
C
IN
C2
R1
C1
PWM
Input
D1
GND
+3.3 V
or +5V
VHI
G1
SW
SWS
PVLO
N/C
VDD
VLO
G2S
G2
PGND
AGND
IN
N/C
UCC27222
L1
Cout
Q1
Q2
V
OUT
GND
+12 V
C3
Figure 5. System Application: 3.3-V or 5-V Power Input with 12 V Available for Gate Drive
Note that the series resistor R1 may be needed to slowdown the turn-on of the main forward switch to limit the
dV/dt which can inadvertently turn on the synchronous rectifier switch. The dV/dt considerations and the
selection of R1 are discussed in the previous section.
(3)
(4)