Datasheet

3
UCC1581
UCC2581
UCC3581
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for VDD = 10V, 0.1µF capacitor
from VDD to GND, 1.0µF capacitor from REF to GND, RT1 = 680kΩ, RT2 = 12kΩ, CT = 750pF and T
A =TJ.
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Current Sense Section
Input Bias Current –150 20 150 nA
Overcurrent Threshold 0.4 0.5 0.6 V
Output Section
OUT Low Level I = 100mA 0.6 1.2 V
OUT High Level I = –100mA, VDD – OUT 0.6 1.2 V
Rise/Fall Time (Note 1) 20 100 ns
Soft start Section
Soft start Current SS = 2V –9 –11.5 –14 µA
Chip Enable Section
VIH 1.9 2.0 2.1 V
VIL 1.7 1.8 1.9 V
Hysteresis 180 230 280 mV
Source Current 51015µA
Overall Section
Start-Up Current VDD < Start Threshold 85 130 µA
Operating Supply Current VC = 0V 300 600 µA
VDD Zener Shunt Voltage I
DD
= 10mA 13.5 15 16.5 V
I
DD Stand-by Shunt Voltage EN = 0V 100 150 µA
Note 1: Guaranteed by design. Not 100% tested in production
CT: Oscillator timing capacitor pin. Minimum value is
100pF.
DCMIN: Input for programming minimum duty cycle
where pulse skipping begins. This pin can be grounded
to disable minimum duty cycle feature and pulse
skipping.
EN: Enable input. This pin has an internal 10µA pull-up.
A logic low input inhibits the PWM output and causes the
soft start capacitor to be discharged.
GND: Circuit ground.
GT: Pin for controlling the gate of an external depletion
mode N-MOSFET for the startup supply. The external
N-MOSFET regulates VDD to 7.5V until the bootstrap
supply comes up, then GT goes low.
ISEN: Input for overcurrent comparator. This function can
be used for pulse-by-pulse current limiting. The threshold
is 0.5V nominal.
OUT: Gate drive output to external N-MOSFET.
REF: 4.0V reference output. A minimum value bypass
capacitor of 1.0µF is required for stability.
RT1: Resistor pin to program oscillator charging current.
The oscillator charging current is
92
20
1
.
.
•






V
RT
.
See Application Diagram Fig. 1.
The current into this pin is
20
1
. V
RT






.
The value of RT1 should be between 220k and 1MΩ.
RT2: Resistor pin to program oscillator discharge time.
The minimum value of RT2 is 10kΩ. See Application
Diagram Fig. 1.
SS: Soft start capacitor pin. The charging current out of
SS is 3.75X the current in RT1.
SYNC: Oscillator synchronization pin. Rising edge
triggered CMOS/TTL compatible input with a 2.1V
threshold. SYNC should be grounded if not used. The
minimum pulse width of the SYNC signal is 100ns.
VC: Control voltage input to PWM comparator. The
nominal control range of VC is 1.0V to 2.5V.
VDD: Chip input power with an 15V internal clamp. VDD
is regulated by startup FET to 7.5V until the bootstrap
voltage comes up. VDD should be bypassed at the chip
with a 0.1µF minimum capacitor.
PIN DESCRIPTIONS