Datasheet

Layout
3-2
3.1 Layout
The EVM PCB consists of two layers of 1.5 oz. copper. The top side
(component) layout of the EVM is shown in Figure 3–1. Large power and
ground planes are used to minimize trace resistance. The input capacitor (C3)
is located close to the input pin. Proper board layout is critical to ensure the
best noise and PSRR performance. The ground side of the output capacitor
(C4) is close to the board ground connection for improved transient response.
Ground for the bypass capacitor (C5) has a low impedance connection to the
ground for the IC. The top and bottom side layouts are shown in Figure 3–2
and Figure 3–3 respectively.
Figure 3–1. Top Side Asembly