Datasheet

UC1709, UC2709, UC3709
DUAL HIGH- SPEED FET DRIVER
SLUS196C -- NOVEMBER 1996 -- REVISED FEBRUARY 2008
2
www.ti.com
THERMAL RESISTANCE TABLE
PACKAGE θjc(°C/W) θja(°C/W)
SOIC --16 (DW) 20
(1)
35 to 58
(3)
DIL--16 (J) 28
(2)
125 to 160
LCC--16 (L) 20
(2)
70 to 80
DIL--16 (N) 45 90
(3)
NOTES: (1) Specified thermal resistance is θjl (junction to lead)where noted.
(2) θjc data values stated were derived from MIL-STD-1835B. MIL-STD-1835B states, “The baseline values
shown are worst case (mean +2s) for a 60x60 mil microcircuit device silicon die and applicable for devices
with die sizes up to 14400 square mils. For device die sizes greater than 14400 square mils use the
following values; dual-in-line, 11°C/W; flat pack, .10°C/W; pin grid array, 10°C/W”.
(3) Specified θja (junction to ambient) is for devices mounted to 5-inch
2
FR4 P C board with one ounce copper
where noted. When resistance range is given, lower values are for 5 inch
2
aluminum PC board. Test PWB
was 0.062 inch thick and typically used 0.635-mm trace widths for power packages and 1.3-mm trace
widths for non-power packages with a 100-mil x 100-mil probe land area at the end of each trace.
1
2
3
4
8
7
6
5
N/C
INPUT A
GROUND
INPUT B
N/C
OUTPUT A
V
CC
OUTPUT B
8 PIN DIL N OR J PACKAGE
(TOP VIEW)
N/C -- No internal connection
V
CC
N/C
N/C
N/C
OUTPUT B
INPUT B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
N/C
N/C
GROUND
INPUT A
N/C
N/C
OUTPUT A
N/C
N/C
N/C
10
9
SOIC--16 (TOP VIEW)
DW PACKAGE
LCC--20 (TOP VIEW)
L PACKAGES
3
18
17
16
N/C
122019
15
14
4
5
6
7
8
91110 12 13
N/C INPUT A OUTPUT A N/C
N/C
N/C
V
CC
N/C
N/C
N/C
N/C
GROUND
N/C
N/C
N/C
OUTPUT B
N/C
INPUT B
N/C