Datasheet
2
1
3
V + V
C S
5
4
N.I. IN
INV. IN
GND
OUT
2
1
3
V
C
6
4
N.I. IN
INV. IN
LOGIC
GND
N/C
7
8
5
PWR
GND
OUT
V
S
2
PWR GND
20
17
1 19
16
15
11
18
14
139 1210
3
OUT
V
C
N/C
N/C
5
6
7
8
4
N/C
N/C
N/C
N/C
V
S
N/C
N/C
N/C
N/C
INV. IN
N/C
LOGIC GND
N/C
N/C
N.I. IN
UC1705
UC2705, UC3705
SLUS370D –JULY 1995–REVISED MARCH 2012
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
CONNECTION DIAGRAMS
DIL-8 MINIDIP, SOIC-8 5-PIN TO-220
(TOP VIEW) (TOP VIEW)
N, JG OR D PACKAGE T PACKAGE
xxx xxx
LCCC-20
(TOP VIEW)
FK PACKAGE
xxx
2 Submit Documentation Feedback Copyright © 1995–2012, Texas Instruments Incorporated
Product Folder Link(s): UC1705 UC2705 UC3705