Datasheet

UC2827-1, UC2827-2
UC3827-1, UC3827-2
SLUS365D –APRIL 1999– REVISED APRIL 2011 www.ti.com
DESCRIPTION (CONTINUED)
The UC3827 can be set up in traditional voltage mode control using input voltage feedforward technique or in
current mode control. Using current mode control prevents potential core saturation of the push-pull transformer
due to mismatches in timing and in component tolerances. With average current mode control, precise control of
the inductor current feeding the push-pull stage is possible without the noise sensitivity associated with peak
current mode control. The UC3827 average current mode loop can also be connected in parallel with the voltage
regulation loop to assist only in fault conditions.
Other valuable features of the UC3827 include bidirectional synchronization capability, user programmable
overlap time (UC3827-1), user programmable gap time (UC3827-2), a high bandwidth differential current sense
amplifier, and soft start circuitry.
ORDERING INFORMATION
(1)
PACKAGES
T
A
= T
J
PUSH-PULL TOPOLOGY
SOIC-24 PDIP-24 PLCC-28
Current Fed UC2827DW-1 UC2827N-1 -
-40°C to 85°C
Voltage Fed UC2827DW-2 UC2827N-2 -
Current Fed UC3827DW-1 UC3827N-1 UC3827Q-1
0°C to 70°C
Voltage Fed UC3827DW-2 UC3827N-2 -
(1) The DW and Q packages are also available taped and reeled. Add a TR suffix to the device type (i.e., UC2827DWTR-1).
THERMAL INFORMATION
UC2827-1, UC2827-1,
UC2827-2, UC2827-2,
UC3827-1, UC3827-1,
THERMAL METRIC UNITS
UC3827-2 UC3827-2
N J
24 PINS 24 PINS
θ
JA
Junction-to-ambient thermal resistance
(1)
60 70 to 80
°C/W
θ
JCtop
Junction-to-case (top) thermal resistance
(2)
30 28
(1) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(2) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
THERMAL INFORMATION
UC2827-1, UC2827-1,
UC2827-2, UC2827-2,
UC3827-1, UC3827-1,
THERMAL METRIC UNITS
UC3827-2 UC3827-2
DW
(1)
QLCC
28 PINS 28 PINS
θ
JA
Junction-to-ambient thermal resistance
(2)
71 to 83 40 to 65
°C/W
θ
JCtop
Junction-to-case (top) thermal resistance
(3)
24 30
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
2 Copyright © 1999–2011, Texas Instruments Incorporated