Datasheet

UC2825A-EP
www.ti.com SGLS305D –JULY 2005–REVISED SEPTEMBER 2010
Electrical Characteristics
T
A
= –40°C to 125°C for Q temperature and T
A
= –55°C to 125°C for M temperature, R
T
= 3.65 kΩ, C
T
= 1 nF, V
CC
= 12 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Reference, V
REF
V
O
Output voltage range T
J
= 25°C, I
O
= 1 mA 5.05 5.1 5.15 V
Line regulation 12 V ≤ VCC ≤ 20 V 2 15 mV
Load regulation 1 mA ≤ I
O
≤ 10 mA 5 20 mV
Total output variation Line, load, temperature 5.03 5.17 V
Temperature stability
(1)
T
(min)
< T
A
< T
(max)
0.2 0.4 mV/°C
Output noise voltage
(1)
10 Hz < f < 10 kHz 50 mV
RMS
Long-term stability
(1)
T
J
= 125°C, 1000 h 5 25 mV
Short-circuit current V
REF
= 0 V 30 60 90 mA
Oscillator
T
J
= 25°C 375 400 425 kHz
f
OSC
Initial accuracy
(1)
R
T
= 6.6 kΩ, C
T
= 220 pF, T
A
= 25°C 0.9 1 1.1 MHz
Line, temperature 350 450 kHz
Total variation
(1)
R
T
= 6.6 kΩ, C
T
= 220 pF 0.85 1.15 MHz
Voltage stability 12 V ≤ VCC ≤ 20 V 1%
Temperature stability
(1)
T
(min)
< T
A
< T
(max)
5%
High-level output voltage, clock 3.7 4 V
Low-level output voltage, clock 0 0.2 V
Ramp peak 2.6 2.8 3 V
Ramp valley 0.7 1 1.25 V
Ramp valley to peak 1.6 1.8 2 V
I
OSC
Oscillator discharge current R
T
= OPEN, V
CT
= 2 V 9 10 11 mA
Error Amplifier
Input offset voltage 2 10 mV
Input bias current 0.6 3 mA
Input offset current 0.1 1 mA
Open-loop gain 1 V < V
O
< 4 V 60 95 dB
CMRR Common-mode rejection ratio 1.5 V < V
CM
< 5.5 V 75 95 dB
PSRR Power-supply rejection ratio 12 V < VCC < 20 V 85 110 dB
I
O(sink)
Output sink current V
EAOUT
= 1 V 1 2.5 mA
I
O(src)
Output source current V
EAOUT
= 4 V –1.3 –0.5 mA
High-level output voltage I
EAOUT
= –0.5 mA 4.5 4.7 5 V
Low-level output voltage I
EAOUT
= –1 mA 0 0.5 1 V
Gain bandwidth product f = 200 kHz 6 12 MHz
Slew rate
(1)
6 9 V/ms
PWM Comparator
I
BIAS
Bias current, RAMP V
RAMP
= 0 V –1 –8 mA
Minimum duty cycle 0%
Maximum duty cycle 85%
t
LEB
Leading-edge blanking time R
LEB
= 2 kΩ, C
LEB
= 470 pF 300 375 450 ns
R
LEB
Leading-edge blanking resistance V
CLK/LEB
= 3 V 8.5 10 11.5 kΩ
V
ZDC
Zero dc threshold voltage, EAOUT V
RAMP
= 0 V 1.1 1.25 1.4 V
t
DELAY
Delay-to-output time
(1)
V
EAOUT
= 2.1 V, V
ILIM
= 0-V to 2-V step 50 80 ns
(1) Specified by design. Not production tested.
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