Datasheet

UC1714, UC1715, UC2714
UC2715, UC3714, UC3715
www.ti.com SLUS170B –FEBRUARY 1999–REVISED MAY 2013
ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise stated, V
CC
= 15 V, ENBL ≥ 2 V, R
T
1 = 100 kΩ from T1 to GND, R
T
2 = 100 kΩ from T2 to GND, and −55°C
< T
A
< 125°C for the UC1714 and UC1715, –40°C < T
A
< 85°C for the UC2714 and UC2715, and 0°C < T
A
< 70°C for the
UC3714 and UC3715, T
A
= T
J
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Fall Time C
L
= 1000 pF 30 60 ns
T2 Delay, PWR to AUX INPUT falling edge, R
T
2 = 10 kΩ
(1)
20 50 80
ns
INPUT falling edge, R
T
2 = 100 kΩ
(1)
250 350 550
AUX Prop Delay INPUT rising edge, 50%
(2)
35 80 ns
Enable (ENBL)
Input Threshold 0.8 1.2 2 V
I
IH
Input Current ENBL = 15 V 1 10 µA
I
IL
Input Current ENBL = 0 V –1 –10 µA
T1
Current Limit T1 = 0 V –1.6 –2 mA
Nominal Voltage at T1 2.7 3 3.3 V
Minimum T1 Delay T1 = 2.5 V
(1)
40 70 ns
T2
Current Limit T2 = 0 V –1.2 –2 mA
Nominal Voltage at T2 2.7 3 3.3 V
Minumum T2 Delay T2 = 2.5 V
(1)
50 100 ns
Input (INPUT)
Input Threshold 0.8 1.4 2 V
I
IH
Input Current INPUT = 15 V 1 10 µA
I
IL
Input Current INPUT = 0 V –5 –20 µA
DEVICE INFORMATION
DIL-8, SOIC-8; J or N, D Packages
SOIC-16; DP Package
(TOP VIEW)
(TOP VIEW)
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Product Folder Links: UC1714 UC1715 UC2714 UC2715 UC3714 UC3715