Datasheet

UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134D − SEPTEMBER 2002 − REVISED JANUARY 2013
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, T
A
= −55_C to 125_C for the UC184xAM-EP, V
CC
= 15 V (see Note 1),
R
T
= 10 kΩ, C
T
= 3.3 nF, and T
A
= T
J
(unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Error Amplifier Section
Input voltage COMP = 2.5 V 2.45 2.5 2.55 V
Input bias current −0.3 −1 μA
Open loop voltage gain (A
VOL)
V
O
= 2 V to 4 V 65 90 dB
Unity gain bandwidth See Note 2
T
J
= 25_C
0.7 1 MHz
PSRR V
CC
= 12 V to 25 V 60 70 dB
Output sink current FB = 2.7 V, COMP = 1.1 V 2 6 mA
Output source current FB = 2.3 V, COMP = 5 V −0.5 −0.8 mA
V
OUT
high FB = 2.3 V, R
L
= 15 kΩ to GND 5 6 V
V
OUT
low FB = 2.7 V, R
L
= 15 kΩ to V
REF
0.7 1.1 V
Current Sense Section
Gain See Note 3 and Note 4 2.85 3 3.15 V/V
Maximum input signal COMP = 5 V, See Note 3 0.9 1 1.1 V
PSRR V
CC
= 12 V to 25 V, See Note 3 70 dB
Input bias current −2 −10 μA
Delay to output I
SENSE
= 0 V to 2 V, See Note 2 150 300 ns
Output Section (OUT)
Low level output voltage
I
OUT
= 20 mA 0.1 0.4
V
Low-level output voltage
I
OUT
= 200 mA 15 2.2
V
High level output voltage
I
OUT
= −20 mA 13 13.5
V
High-level output voltage
I
OUT
= −200 mA 12 13.5
V
Rise time C
L
= 1 nF, See Note 2
T
J
= 25_C
50 150 ns
Fall time C
L
= 1 nF, See Note 2
T
J
= 25_C
50 150 ns
UVLO saturation V
CC
= 5 V, I
OUT
= 10 mA 0.7 1.2 V
Undervoltage Lockout Section
Start threshold
UC1842A,
UC1844A
15 16 17
V
Start threshold
UC1843A,
UC1845A
7.8 8.4 9
V
Minimum operation voltage after turn on
UC1842A,
UC1844A
9 10 11
V
Minimum operation voltage after turn on
UC1843A,
UC1845A
7 7.6 8.2
V
NOTES: 1. Adjust V
CC
above the start threshold before setting at 15 V.
2. Not production tested.
3. Parameter measured at trip point of latch with V
FB
at 0 V.
4. Gain is defined by:
A =
DV
COMP
DV
SENSE
; 0 v V
SENSE
v 0.8 V.