Datasheet

The
and no longer supplied.
m
A733M is obsolete
m m
  
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, V
CC±
= ±6 V, T
A
= 25°C
PARAMETER
FIGURE
TEST CONDITIONS
GAIN
†
mA733C mA733M
UNIT
PARAMETER
FIGURE
TEST CONDITIONS
GAIN
OPTION
†
MIN TYP MAX MIN TYP MAX
UNIT
Large-signal
differential
1 250 400 600 300 400 500
A
VD
Large-signal
differential
voltage
1 V
OD
= 1 V
2 80 100 120 90 100 110
V/V
A
VD
voltage
amplification
1
V
OD
= 1 V
3 8 10 12 9 10 11
V/V
1 50 50
BW Bandwidth 2 R
S
= 50 Ω
2 90 90
MHz
BW
Bandwidth
2
R
S
= 50 Ω
3 200 200
MHz
I
IO
Input offset
current
Any 0.4 5 0.4 3 µA
I
IB
Input bias current Any 9 30 9 20 µA
V
ICR
Common-mode
input voltage
range
1 Any ±1 ±1 V
V
OC
Common-mode
output voltage
1 Any 2.4 2.9 3.4 2.4 2.9 3.4 V
V
OO
Output offset
1
1 0.6 1.5 0.6 1.5
V
V
OO
Output offset
voltage
1
2 & 3 0.35 1.5 0.35 1
V
V
OPP
Maximum peak-
to-peak output
voltage swing
1 Any 3 4.7 3 4.7 V
1 4 4
r
i
Input resistance 3 V
OD
≤ 1 V
2 10 24 20 24
kΩ
r
i
Input resistance
3
V
OD
≤ 1 V
3 250 250
kΩ
r
o
Output resistance 20 20 Ω
C
i
Input capacitance 3 V
OD
≤ 1 V 2 2 2 pF
CMRR
Common-mode
4
V
IC
= ±1 V,
f ≤ 100 kHz
2 60 86 60 86
dB
CMRR
Common-mode
rejection ration
4
V
IC
= ±1 V,
f = 5 MHz
2 70 70
dB
k
SVR
Supply voltage
rejection ratio
(∆V
CC
/(∆V
IO
)
1 ∆V
CC±
= ±0.5 V 2 50 70 50 70 dB
V
n
Broadband
equivalent input
noise voltage
5 BW = 1 kHz to 10 MHz Any 12 12 µV
Propagation
R
S
= 50 Ω,
1 7.5 7.5
t
pd
Propagation
delay time
2
R
S
= 50 Ω,
Output voltage
step = 1 V
2 6.0 10 6.0 10
ns
t
pd
delay time
2
Output voltage
step = 1 V
3 3.6 3.6
ns
R
S
= 50 Ω,
1 10.5 10.5
t
r
Rise time 2
R
S
= 50 Ω,
Output voltage
step = 1 V
2 4.5 12 4.5 10
ns
t
r
Rise time
2
Output voltage
step = 1 V
3 2.5 2.5
ns
I
sink(max)
Maximum output
sink current
Any 2.5 3.6 2.5 3.6 mA
I
CC
Supply current
No load,
No signal
Any 16 24 16 24 mA
†
The gain option is selected as follows:
Gain Option 1: Gain-adjust pin 1A is connected to pin 1B, and pins 2A and 2B are open.
Gain Option 2: Gain-adjust pin 1A and pin 1B are open, pin 2A is connected to pin 2B.
Gain Option 3: All four gain-adjust pins are open.