Datasheet

T1
T2
T4
T3
V
CCA
V
CCB
A
B
One
Shot
One
Shot
One
Shot
One
Shot
1 kΩ
1 kΩ
TXB0304
SCES831D –SEPTEMBER 2011–REVISED OCTOBER 2012 www.ti.com
PRINCIPLES OF OPERATION
Applications
The TXB0304 can be used in level-translation applications for interfacing devices or systems operating at
different interface voltages with one another.
Architecture
The TXB0304 architecture (see Figure 1) does not require a direction-control signal to control the direction of
data flow from A to B or from B to A. In a dc state, the output drivers of the TXB0304 can maintain a high or low,
but are designed to be weak, so that they can be overdriven by an external driver when data on the bus starts
flowing the opposite direction. The output one shots detect rising or falling edges on the A or B ports. During a
rising edge, the one shot turns on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-
to-high transition. Similarly, during a falling edge, the one shot turns on the NMOS transistors (T2, T4) for a short
duration, which speeds up the high-to-low transition. The typical output impedance during output transition is 30
Ω at V
CCO
= 0.9 V to 1 V, 10 Ω at V
CCO
= 1.1 V to 1.7 V, and 5 Ω at V
CCO
= 1.8 V to 3.3 V.
Figure 1. Architecture of TXB0302 I/O Cell
Input Driver Requirements
Typical I
IN
vs V
IN
characteristics of the TXB0304 are shown in Figure 2. For proper operation, the device driving
the data I/Os of the TXB0304 must have drive strength of at least ±3 mA.
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