Datasheet

TXB0101
SCES639B –JANUARY 2007–REVISED MAY 2012 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION/ORDERING INFORMATION
This 1-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to
track V
CCA
. V
CCA
accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track V
CCB
. V
CCB
accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation
between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. V
CCA
should not exceed V
CCB
.
When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
ORDERING INFORMATION
(1)
ORDERABLE TOP-SIDE
T
A
PACKAGE
(2)
PART NUMBER MARKING
(3) (4)
NanoFree™ – WCSP (DSBGA)
Reel of 3000 TXB0101YZPR
(5)
27_
0.23-mm Large Bump – YZP (Pb-free)
SOP – DRL Reel of 4000 TXB0101DRLR
(5)
27R
Reel of 3000 TXB0101DBVR NFC_
–40°C to 85°C
SOT (SOT-23) – DBV
Reel of 250 TXB0101DBVT NFC_
Reel of 3000 TXB0101DCKR
(5)
27_
SOT (SC-70) – DCK
Reel of 250 TXB0101DCKT
(5)
27_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
(4) DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
(5) Package preview
PIN DESCRIPTION
NO. NAME FUNCTION
1 V
CCA
A-port supply voltage. 1.2 V ≤ V
CCA
≤ 3.6 V and V
CCA
≤ V
CCB
2 GND Ground
3 A Input/output A. Referenced to V
CCA
.
4 B Input/output B. Referenced to V
CCB
.
3-state output enable. Pull OE low to place all outputs in 3-state mode.
5 OE
Referenced to V
CCA
.
6 V
CCB
B-port supply voltage. 1.65 V ≤ V
CCB
≤ 5.5 V
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Product Folder Link(s): TXB0101