Datasheet
PRODUCTPREVIEW
TWL6040
SWCS052A – AUGUST 2010– REVISED DECEMBER 2011
www.ti.com
DESCRIPTION
The TWL6040 device is an audio coder/decoder (codec) with a high level of integration providing analog audio
codec functions for portable applications, as shown in Figure 1. It contains multiple audio analog inputs and
outputs, as well as microphone biases and accessory detection. It is connected to the OMAP4™ host processor
through a proprietary PDM interface for audio data communication enabling partitioning with optimized power
consumption and performance. Multichannel audio data is multiplexed to a single wire for downlink (PDML) and
uplink (PDMUL).
The OMAP4 device provides the TWL6040 device with five PDM audio-input channels (DL0–DL4). Channels
DL0–DL3 are connected to four parallel DAC channels multiplexed to stereo headphone (HSL, HSR), stereo
speaker (HFL, HFR), and earpiece (EAR) or stereo line outputs (AUXL, AUXR).
The stereo headphone path has a low-power (LP) mode operating from a 32-kHz sleep clock to enable more
than 100 hours of MP3 playback time. Very-high dynamic range of 104 dBA is achieved when using the system
clock input and DAC path high-performance (HP) mode. Class-AB headphone drivers provide a 1-V
rms
output
and are ground centered for capless connection to headphone, thus enabling system size and cost reduction.
The earpiece driver is a differential class-AB driver with 2 V
rms
capability to a typical 32-Ω load or 1.4 V
rms
to a
typical 16-Ω load.
Stereo speaker path has filterless class-D outputs with 1.5-W capability per channel. For output power
maximization supply connection to an external boost is supported. Speaker drivers also support also hearing aid
coil loads. For vibrator and haptic feedback support, the TWL6040 has two PWM channels with independent
input signals from DL4 or inter-integrated circuit (I
2
C™).
Vibrator drivers are differential H-bridge outputs, enabling fast acceleration and deceleration of vibrator motor. An
external driver for a hearing aid coil or a piezo speaker requiring high voltage can be connected to line outputs.
The TWL6040 supports three differential microphone inputs (MMIC, HMIC, SMIC) and a stereo line-input (AFML,
AFMR) multiplexed to two parallel ADCs. The PDM output from the ADCs is transmitted to the OMAP4 processor
through UL0 and UL1. AFML, AFMR inputs can also be looped to analog outputs (LB0, LB1).
Two LDOs provide a voltage of 2.1 V to bias analog microphones (MBIAS and HBIAS). The maximum output
current is 2 mA for each analog bias, allowing up to two microphones on one bias. Two LDOs provide a voltage
of 1.8 V/1.85 V to bias digital microphones (DBIAS1 and DBIAS2). One bias generator can bias up several digital
microphones at the same time, with a total maximum output current of 10 mA.
The TWL6040 has an integrated negative charge pump (NCP) and two LDOs (HS LDO and LS LDO) for high
PSRR. The only external supply needed is 2.1 V, which is available from the 2.1-V DC-DC of the TWL6030
power management IC (PMIC) in the OMAP4 system. By powering audio from low-noise 2.1-V DC-DC of low
power consumption, high dynamic range and high output swing at headset output are achieved. All other supply
inputs can be directly connected to battery or system 1.8-V I/O.
Two integrated PLLs enable operatation from a 12/19.2/26/38.4-MHz system clock (MCLK) or, in LP playback
mode, from a 32-kHz sleep clock (CLK32K). The frequency plan is based on a 48-kS/s audio data rate for all
channels, and host processor uses sample-rate converters to interface with different sample rates (for example,
44.1 kHz). In the specific case of low-power audio playback, the 44.1-kS/s and 48-kS/s rates are supported by
the TWL6040. Transitions between sample rates or input clocks are seamless.
Accessory plug and unplug detections are supported (PLUGDET). Some headsets have a manual switch for
submitting send/end signal to the terminal through the microphone input pin. This feature is supported by a
periodic accessory button press detection to minimize current consumption in sleep mode. Detection cycle
properties can be programmed according to system requirements.
Figure 1 shows a simplified block diagram of the device.
2 Copyright © 2010–2011, Texas Instruments Incorporated