Datasheet

T2
T1
V
CCA
V
CCB
N1
Translator
One-Shot
One-Shot
SDIO-DATAx(B)
R2
Bias
SDIO-DATAx(A)
R1
T4
T3
Translator
One-Shot
One-Shot
TWL1200
www.ti.com SCES786A –JUNE 2009–REVISED NOVEMBER 2009
PRINCIPLES OF OPERATION
Applications
The TWL1200 device has been designed to bridge the digital-switching compatibility gap between two voltage
nodes to successfully interface logic threshold levels between a host processor and the Texas Instruments
Wi-Link-6 WLAN/BT/FM products. It is intended to be used in a point-to-point topology when interfacing these
devices that may or may not be operating at different interface voltages.
Architecture
The BT/UART and PCM/Audio subsystem interfaces consist of a fully-buffered voltage translator design that has
its output transistors to source and sink current optimized for drive strength.
The SDIO lines comprise a semi-buffered auto-direction-sensing based translator architecture (see Figure 27)
that does not require a direction-control signal to control the direction of data flow of the A to B ports (or from B
to A ports).
Figure 27. Architecture of an SDIO Switch-Type Cell
Each of these bidirectional SDIO channels independently determines the direction of data flow without a
direction-control signal. Each I/O pin can be automatically reconfigured as either an input or an output, which is
how this auto-direction feature is realized.
The following two key circuits are employed to facilitate the "switch-type" voltage translation function:
1. Integrated pullup resistors to provide dc-bias and drive capabilities
2. An N-channel pass-gate transistor topology (with a high R
ON
of ~300 Ω) that ties the A-port to the B-port
3. Output one-shot (O.S.) edge-rate accelerator circuitry to detect and accelerate rising edges on the A or B
ports
Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): TWL1200