Datasheet

TVP5158, TVP5157, TVP5156
www.ti.com SLES243G –JULY 2009–REVISED APRIL 2013
Table 4-87. Super-Frame SAV2EAV Duration Status
Subaddress D2h-D3h
Default Read Only
Subaddress 7 6 5 4 3 2 1 0
D2h SAV2EAV [7:0]
D3h Reserved EAV2SAV [10:8]
SAV2EAV [10:0]
Super-frame SAV2EAV duration (bytes). For line-interleaved mode only.
Table 4-88. VBUS Data Access With No VBUS Address Increment
Subaddress E0h
Default 00h
7 6 5 4 3 2 1 0
VBUS data [7:0]
VBUS data [7:0]
VBUS data register for VBUS single-byte read/write transaction
Table 4-89. VBUS Data Access With VBUS Address Increment
Subaddress E1h
Default 00h
7 6 5 4 3 2 1 0
VBUS data [7:0]
VBUS data [7:0]
VBUS data register for VBUS multi-byte read/write transaction. VBUS address is auto-incremented after each data byte read/write.
Table 4-90. VBUS Address Access
Subaddress E8h E9h EAh
Default 00h 00h 00h
Subaddress 7 6 5 4 3 2 1 0
E8h VBUS address [7:0]
E9h VBUS address [15:8]
EAh VBUS address [23:16]
VBUS access address [23:0]
VBUS is a 24-bit wide internal bus. The user needs to program the 24-bit address of the internal register to be accessed via host
port indirect access mode.
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