Datasheet

TVP5158, TVP5157, TVP5156
www.ti.com SLES243G –JULY 2009–REVISED APRIL 2013
Table 4-61. Noise Reduction Y/U/V T0
Subaddress 9Eh 9Fh A0h
Default 0Ah BCh BCh
Subaddress 7 6 5 4 3 2 1 0
9Eh Noise Reduction Y T0 [7:0]
9Fh Noise Reduction U T0 [7:0]
A0h Noise Reduction V T0 [7:0]
These registers control how much noise filtering is done for Y/U/V channels. The higher the value is, the more noise filtering at the expense
of video details.
Table 4-62. Vertical Line Count Status
Subaddress A2h-A3h
Default Read Only
Subaddress 7 6 5 4 3 2 1 0
A2h Vertical line [7:0]
A3h Reserved Vertical line [9:8]
This status register is only updated when a status request is initiated via bit 0 of subaddress 24h.
Vertical line [9:0] represent the detected a total number of lines from the previous frame. This can be used with nonstandard video signals
such as a VCR in trick mode to synchronize downstream video circuitry.
NOTE: This register is not double buffered.
Because this register is a double-byte register, it is necessary to "capture" the setting into the register to ensure that the value is not
updated between reading the lower and upper bytes. To cause this register to "capture" the current settings bit 0 of I
2
C register 24h (Status
Request) should be set to a 1. After the internal processor has updated this register, bit 0 of register 24h is cleared, indicating that both
bytes of the vertical line count register have been updated and can be read. Either byte may be read first, because no further update occurs
until bit 0 of 24h is set to 1 again.
Table 4-63. Output Formatter Control 1
Subaddress A8h
Default 44h
7 6 5 4 3 2 1 0
YCbCr code
Reserved CbCr range Reserved
range
This register should be written to all four video decoder cores.
YCbCr output code range
0 ITU-R BT.601 coding range (Y ranges from 16 to 235. Cb and Cr range from 16 to 240.)
1 Extended coding range (Y, Cb and Cr range from 1 to 254.) (default)
CbCr range format
0 Offset binary code (2's complement + 512) (default)
1 Straight binary code (2's complement)
Copyright © 2009–2013, Texas Instruments Incorporated Internal Control Registers 69
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