Datasheet
TVP5158, TVP5157, TVP5156
SLES243G –JULY 2009–REVISED APRIL 2013
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4 Internal Control Registers
4.1 Overview
The decoder is initialized and controlled by a set of internal registers which set all device operating
parameters. Communication between the external controller and the decoder is through I
2
C. Table 4-1
shows the summary of these registers. The reserved registers must not be written. Reserved bits in the
defined registers must be written with 0s, unless otherwise noted. The detailed programming information
of each register is described in the following sections.
I
2
C register FEh controls which of the four decoders will receive I
2
C commands. I
2
C register FFh controls
which decoder core responds to I
2
C reads. Note that for a read operation, it is necessary to perform a
write first to set the desired subaddress for reading.
Compared to previous video decoder, TVP5154A, the TVP5158, TVP5157, and TVP5156 add decoder
auto increment and address auto increment bits control. If decoder auto increment bit is set, the next
read/write is from/to the next decoder that is enabled. If address auto-increment bit is set, the address
increments after all the decoders enabled read/writes are completed. The detail of I
2
C registers FEh and
FFh is shown in their register section.
Table 4-1. Registers Summary
I
2
C
REGISTER NAME DEFAULT R/W
(1)
SUBADDRESS
Status 1 00h R
Status 2 01h R
Color Subcarrier Phase Status 02h R
Reserved 03h
ROM Version 04h R
RAM Version MSB 05h R
RAM Version LSB 06h R
Reserved 07h
Chip ID MSB 08h 51h R
Chip ID LSB 09h 58h R
Reserved 0Ah - 0Bh
Video Standard Status 0Ch R
Video Standard Select 0Dh 00h R/W
CVBS Autoswitch Mask 0Eh 03h R/W
Auto Contrast Mode 0Fh 03h R/W
Luminance Brightness 10h 80h R/W
Luminance Contrast 11h 80h R/W
Brightness and Contrast Range Extender 12h 00h R/W
Chrominance Saturation 13h 80h R/W
Chrominance Hue 14h 00h R/W
Reserved 15h
Color Killer 16h 10h R/W
Reserved 17h
Luminance Processing Control 1 18h 40h R/W
Luminance Processing Control 2 19h 00h R/W
Power Control 1Ah 00h R/W
Chrominance Processing Control 1 1Bh 00h R/W
Chrominance Processing Control 2 1Ch 0Ch R/W
(1) R = Read only, W = Write only, R/W = Read and write
42 Internal Control Registers Copyright © 2009–2013, Texas Instruments Incorporated
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