Datasheet

TVP5158, TVP5157, TVP5156

SLES243G –JULY 2009–REVISED APRIL 2013

www.ti.com

List of Figures

1-1 Functional Block Diagram....................................................................................................... 11

3-1 Video Analog Processing and ADC Block Diagram ......................................................................... 15

3-2 Anti-Aliasing Filter Frequency Response ..................................................................................... 16

3-3 Composite Processor Block Diagram.......................................................................................... 17

3-4 Color Low-Pass Filter Frequency Response ................................................................................. 18

3-5 Color Low-Pass Filter with Filter Characteristics, NTSC/PAL ITU-R BT.601 Sampling................................. 18

3-6 Chroma Trap Filter Frequency Response, NTSC ITU-R BT.601 Sampling .............................................. 19

3-7 Chroma Trap Filter Frequency Response, PAL ITU-R BT.601 Sampling ................................................ 19

3-8 Luminance Edge-Enhancer Peaking Block Diagram ........................................................................ 20

3-9 Peaking Filter Response, NTSC/PAL ITU-R BT.601 Sampling ............................................................ 20

3-10 2-Ch Pixel-Interleaved Mode Timing Diagram................................................................................ 23

3-11 4-Ch Pixel-Interleaved Mode Timing Diagram................................................................................ 24

3-12 Cascade Connection for 16-Ch CIF Recoding and Multi-Ch CIF Preview ............................................... 27

3-13 Cascade Connection for 16-Ch CIF Recoding and Multi-Ch Half-D1 Preview........................................... 28

3-14 Cascade Connection for 16-Ch CIF Recoding and 2-Ch D1/Multi-Ch CIF Preview..................................... 28

3-15 Start Code in 8-Bit BT.656 Interface........................................................................................... 29

3-16 Start Code in 16-Bit YCbCr 4:2:2 Interface ................................................................................... 30

3-17 Audio Sub-System Functional Diagram ....................................................................................... 33

3-18 Serial Audio Interface Timing Diagram ........................................................................................ 33

3-19 Audio Cascade Connection ..................................................................................................... 34

3-20 VBUS Access ..................................................................................................................... 39

3-21 Clock and Crystal Connectivity ................................................................................................. 40

3-22 Reset Timing...................................................................................................................... 41

5-1 Video Output Clock and Data Timing.......................................................................................... 94

5-2 I

C Host Port Timing ............................................................................................................. 95

6-1 4-Ch D1 Application (Single BT.656 Interface)............................................................................... 97

6-2 4-Ch D1 Application (16-Bit YCbCr 4:2:2 Interface) ......................................................................... 97

6-3 8-Ch CIF Real Time Encoding and Multi-Ch D1 Preview Application..................................................... 98

6-4 8-Ch CIF Real Time Encoding and Multi-Ch D1 Preview Application..................................................... 98

6-5 Video Input Connectivity ....................................................................................................... 100

6-6 Audio Input Connectivity ....................................................................................................... 100