Datasheet

I
2
C Registers
VBUS Registers
00h
FFh
00 0000h
A0 3FFFh
VBUS
Data
VBUS
Address
VBUS [23:0]
Host
Processor
I
2
C
40 3EEFh
E0h
E8h
Comb
Filter RAM
E1h
EAh
40 3E50h
TVP5158, TVP5157, TVP5156
www.ti.com SLES243G –JULY 2009–REVISED APRIL 2013
3.10.3 VBUS Access
The TVP5158 video decoder has additional internal registers accessible through an indirect access to an
internal 24-bit address wide VBUS. Figure 3-20 shows the VBUS registers access.
Figure 3-20. VBUS Access
VBUS Write
Single Byte
S B8 ACK E8 ACK VA0 ACK VA1 ACK VA2 ACK P
S B8 ACK E0 ACK Send Data ACK P
Multiple Bytes
S B8 ACK E8 ACK VA0 ACK VA1 ACK VA2 ACK P
S B8 ACK E1 ACK Send Data ACK . . . Send Data ACK P
VBUS Read
Single Byte
S B8 ACK E8 ACK VA0 ACK VA1 ACK VA2 ACK P
S B8 ACK E0 ACK S B9 ACK Read Data NAK P
Multiple Bytes
S B8 ACK E8 ACK VA0 ACK VA1 ACK VA2 ACK P
S B8 ACK E1 ACK S B9 ACK Read Data MACK . . . Read Data NAK P
NOTE: Examples use default I
2
C address
ACK: Acknowledge generated by the slave
MACK: Acknowledge generated by the master
NAK: No Acknowledge generated by the master
Copyright © 2009–2013, Texas Instruments Incorporated Functional Description 39
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Product Folder Links: TVP5158 TVP5157 TVP5156