Datasheet

TVP5158, TVP5157, TVP5156
SLES243G JULY 2009REVISED APRIL 2013
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Programmable Gain Amplifier (PGA)
Gain range: -12 ~ 0 dB, Gain Step: 1.5 dB
Integrated Anti-Aliasing Filter (AAF)
10-Bit Analog-to-Digital Converter
Integrates Audio High-pass filter to eliminate low frequency hum
Digital serial audio interface
16-Bit Linear PCM, 8-Bit A-Law and 8-Bit µ-Law Data
I
2
S or DSP Format
Master and Slave mode operation
Up to 16 slots TDM output
64 f
s
or 256 f
s
system clock
Sampling Rate : 16 kHz, 8 kHz
Audio Cascade connection
Up to 4 cascaded devices
I
2
S format
256 f
s
system clock
Audio Mixing Output
Audio ADC has one register to set mix ratio
The Mixing output pin SD_M can also be used for recording. Combined with the recording output
pin SD_R, two I
2
S bit-streams can be output simultaneously.
3.9.2 Audio Sub-System Functional Diagram
Figure 3-17. Audio Sub-System Functional Diagram
32 Functional Description Copyright © 2009–2013, Texas Instruments Incorporated
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