Datasheet
TVP5158, TVP5157, TVP5156
www.ti.com
SLES243G –JULY 2009–REVISED APRIL 2013
3.8.3 Line-Interleaved Mode Support (TVP5158 only)
The TVP5158 supports 2-Ch, 4-Ch, and 8-Ch line-interleaved modes. In the line-interleaved mode, the
video channels are multiplexed together on a line-by-line basis. Compared to the pixel-interleaved mode,
the line-interleaved mode significantly reduces the code complexity and MIPS consumption of the backend
processor. The 8-Ch modes require connecting two TVP5158 devices together using a video cascade
interface (see Section 3.8.3.3). The TVP5158 also supports different image resolutions (for example, D1,
Half-D1, and CIF) in the line-interleaved mode. All supported line-interleaved modes are shown in Table 3-
10.
Table 3-10. Output Ports Configuration for Line-Interleaved Mode
Cascade I
2
C Address: OCLK
Video Output Format Port A Port B Port C Port D
Stage B0h (MHz)
2-Ch D1 n/a 90h 54 Any 2 of 4 Ch Any 2 of 4 Ch Hi-Z Hi-Z
2-Ch Half-D1 n/a 92h 27 Any 2 of 4 Ch Any 2 of 4 Ch Hi-Z Hi-Z
3-Ch D1 n/a 80h 81/108 Any 3 of 4 Ch Hi-Z Hi-Z Hi-Z
4-Ch D1 n/a A0h 108 All 4 Ch Hi-Z Hi-Z Hi-Z
4-Ch Half-D1 n/a A2h 54 All 4 Ch Hi-Z Hi-Z Hi-Z
4-Ch CIF n/a A3h 27 All 4 Ch Hi-Z Hi-Z Hi-Z
All 4 Ch All 4 Ch
4-Ch D1 (16-bit) n/a A8h 54 Hi-Z Hi-Z
(Y data) (C data)
All 4 Ch All 4 Ch
4-Ch Half-D1 (16-bit) n/a AAh 27 Hi-Z Hi-Z
(Y data) (C data)
6-Ch Half-D1 2-Ch Half-D1
1st 82h 81/108 Hi-Z Hi-Z
Output Input
6-Ch Half-D1
2-Ch Half-D1
2nd 86h 27 Hi-Z Hi-Z Hi-Z
Output
8-Ch Half-D1 4-Ch Half-D1
1st B2h 108 Hi-Z Hi-Z
Output Input
8-Ch Half-D1
4-Ch Half-D1
2nd B6h 54 Hi-Z Hi-Z Hi-Z
Output
8-Ch CIF
1st B3h 54 Hi-Z Hi-Z 4-Ch CIF Input
Output
8-Ch CIF
4-Ch CIF
2nd B7h 27 Hi-Z Hi-Z Hi-Z
Output
4 Ch Half-D1
4-Ch Half-D1 +
n/a E2h 81/108 + Any 1 of 4 Hi-Z Hi-Z Hi-Z
1-Ch D1
D1
4-Ch CIF +
4-Ch CIF + 1-Ch D1 n/a E3h 54 Hi-Z Hi-Z Hi-Z
Any 1 of 4 D1
6-Ch Half-D1
2-Ch Half-D1
1st C2h 108 + Any 1 of 8 Hi-Z 1-Ch D1 Input
Input
6-Ch Half-D1 +
D1
1-Ch D1
2-Ch Half-D1 1-Ch D1
2nd C6h 27 Hi-Z Hi-Z
Output Output
8-Ch CIF +
1st F3h 81/108 Hi-Z 1-Ch D1 Input 4-Ch CIF Input
Any 1 of 8 D1
8-Ch CIF + 1-Ch D1
4-Ch CIF 1-Ch D1
2nd F7h 27 Hi-Z Hi-Z
Output Output
3.8.3.1 2-Ch Line-Interleaved Mode
TVP5158 supports 2-Ch line-interleaved mode at 54 MHz. The video output data with D1 resolution from
any two video channels is multiplexed together on a line basis. The output ports DVO_A and DVO_B are
used in this mode. The output clock OCLK_P is synchronized with both output ports.
Copyright © 2009–2013, Texas Instruments Incorporated Functional Description 25
Submit Documentation Feedback
Product Folder Links: TVP5158 TVP5157 TVP5156