Datasheet
Frequency Response
-35
-30
-25
-20
-15
-10
-5
0
5
- 5 10 15 2 0 25
Frequency (MHz)
Gain(dB)
Anti-Aliasing
Filter
Analog
CVBS Input
Clamp
ADC
Reference & Bias
Output to
Digital
Processing
TVP5158, TVP5157, TVP5156
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SLES243G –JULY 2009–REVISED APRIL 2013
3 Functional Description
3.1 Analog Video Processing and A/D Converters
Each video decoder accepts one composite video input and performs video clamping, anti-aliasing
filtering, video amplification, A/D conversion, and gain and offset adjustments to center the digitized video
signal. Figure 3-1 shows the video analog processing and ADC block diagram.
Figure 3-1. Video Analog Processing and ADC Block Diagram
3.1.1 Analog Video Input
Supports NTSC (J, M, 4.43) and PAL (B, D, G, H, I, M, N, Nc, 60) video standards. Each video decoder
channel supports a composite video input with a pseudo-differential pin which improves the noise
immunity and analog performance.
Each video decoder input should be ac-coupled through a 0.1-µF capacitor. The nominal parallel
termination resistor before the input to the device is 75 Ω.
Each video decoder integrates an anti-aliasing filter to provide good stop-band rejection on the analog
video input signal. Figure 3-2 shows the frequency response of the anti-aliasing filter.
Figure 3-2. Anti-Aliasing Filter Frequency Response
Copyright © 2009–2013, Texas Instruments Incorporated Functional Description 15
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