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9.2.16 Configuration Shared Pins Register
9.2.17 Active Video Cropping Start Pixel MSB for Unscaled Data Register
TVP5154
4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER
WITH INDEPENDENT SCALERS AND FAST LOCK
SLES163A – MARCH 2006 – REVISED JULY 2006
Table 9-4. Luma Filter Selection
NTSC/PAL/SECAM
WCF FILTER SELECT
ITU-R BT.601
00 1.2214
01 0.8782
0
10 0.7297
11 0.4986
00 1.4170
01 1.0303
1
10 0.8438
11 0.5537
Address 0Fh
Default 08h
7 6 5 4 3 2 1 0
Reserved FID PIN Reserved PALI PIN FID/GLCO VSYNC/PALI INTREQ/GPCL/VBLK CLK/PCLK
FID PIN function select:
0 = FID (default, if bit 3 is selected to output FID)
1 = Lock indicator (indicates whether the device is locked vertically)
PALI PIN function select:
0 = PALI (default, if bit 2 is selected to output PALI)
1 = Lock indicator (indicates whether the device is locked horizontally)
FID/GLCO function select (also refer to register 03h for enhanced functionality):
0 = FID
1 = GLCO (default)
VSYNC/PALI function select (also refer to register 03h for enhanced functionality):
0 = VSYNC (default)
1 = PALI
INTREQ/GPCL/VBLK function select:
0 = INTREQ (default)
1 = GPCL or VBLK depending on bit 7 of register 03h
CLK/PCLK (pins 42, 61, 84, 103) function select:
0 = CLK at 27 MHz (default)
1 = PCLK (1 × pixel clock frequency at 13.5 MHz)
See Figure 9-1 for the relationship between the configuration shared pins.
Address 11h
Default 00h
7 6 5 4 3 2 1 0
AVID start pixel MSB [9:2]
Active video cropping start pixel MSB [9:2], set this register first before setting register 12h. The TVP5154
decoder updates the AVID start values only when register 12h is written to. This start pixel value is relative
to the default values of the AVID start pixel.
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