Datasheet

TVP5154A
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SLES214CDECEMBER 2007REVISED SEPTEMBER 2010
7.2.76 FIFO Output Control Register
Address CDh
Default 01h
7 6 5 4 3 2 1 0
Reserved Host access enable
This register is programmed to allow I
2
C access to the FIFO or allowing all VDP data to go out the video port.
Host access enable:
0 = Output FIFO data to the video output Y[7:0]
1 = Allow I
2
C access to the FIFO data (default)
7.2.77 Full Field Enable Register
Address CFh
Default 00h
7 6 5 4 3 2 1 0
Reserved Full field enable
This register enables the full field mode. In this mode, all lines outside the vertical blank area and all lines in the line mode registers
programmed with FFh are sliced with the definition of register FCh. Values other than FFh in the line mode registers allow a different slice
mode for that particular line.
Full field enable:
0 = Disable full field mode (default)
1 = Enable full field mode
Copyright © 2007–2010, Texas Instruments Incorporated Internal Control Registers 71
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