Datasheet

TVP5154A

SLES214C–DECEMBER 2007–REVISED SEPTEMBER 2010

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7.2.72 FIFO Interrupt Threshold Register

Address C8h

Default 80h

7 6 5 4 3 2 1 0

Number of words

This register is programmed to trigger an interrupt when the number of words in the FIFO exceeds this

value (default 80h). This interrupt must be enabled at address C1h. One word equals two bytes.

7.2.73 FIFO Reset Register

Address C9h

Default 00h

7 6 5 4 3 2 1 0

Any data

Writing any data to this register resets the FIFO and clears any data present in both the FIFO and the

VDP registers.

7.2.74 Line Number Interrupt Register

Address CAh

Default 00h

7 6 5 4 3 2 1 0

Field 1 enable Field 2 enable Line number

This register is programmed to trigger an interrupt when the video line number matches this value in bits 5:0. This interrupt must be enabled

at address C1h. The value of 0 or 1 does not generate an interrupt.

Field 1 enable:

0 = Disabled (default)

1 = Enabled

Field 2 enable:

0 = Disabled (default)

1 = Enabled

Line number: (default 00h)

7.2.75 Pixel Alignment Registers

Address CBh CCh

Default 4Eh 00h

Address 7 6 5 4 3 2 1 0

CBh Switch pixel [7:0]

CCh Reserved Switch pixel [9:8]

These registers form a 10-bit horizontal pixel position from the falling edge of sync, where the VDP

controller initiates the program from one line standard to the next line standard; for example, the previous

line of teletext to the next line of closed caption. This value must be set so that the switch occurs after the

previous transaction has cleared the delay in the VDP, but early enough to allow the new values to be

programmed before the current settings are required.

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